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([2001:b07:6468:f312:4051:461:136e:3f74]) by smtp.gmail.com with ESMTPSA id i71sm22623611wri.68.2019.11.04.03.54.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 04 Nov 2019 03:54:01 -0800 (PST) Subject: Re: [PATCH 2/4] kvm: svm: Enable UMIP feature on AMD To: "Moger, Babu" , "tglx@linutronix.de" , "mingo@redhat.com" , "bp@alien8.de" , "hpa@zytor.com" , "rkrcmar@redhat.com" , "sean.j.christopherson@intel.com" , "vkuznets@redhat.com" , "wanpengli@tencent.com" , "jmattson@google.com" Cc: "x86@kernel.org" , "joro@8bytes.org" , "luto@kernel.org" , "zohar@linux.ibm.com" , "yamada.masahiro@socionext.com" , "nayna@linux.ibm.com" , "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" References: <157262960837.2838.17520432516398899751.stgit@naples-babu.amd.com> <157262962352.2838.15656190309312238595.stgit@naples-babu.amd.com> From: Paolo Bonzini Openpgp: preference=signencrypt Message-ID: <37c61050-e315-fc84-9699-bb92e5afacda@redhat.com> Date: Mon, 4 Nov 2019 12:54:00 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <157262962352.2838.15656190309312238595.stgit@naples-babu.amd.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/11/19 18:33, Moger, Babu wrote: > diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c > index 4153ca8cddb7..79abbdeca148 100644 > --- a/arch/x86/kvm/svm.c > +++ b/arch/x86/kvm/svm.c > @@ -2533,6 +2533,11 @@ static void svm_decache_cr4_guest_bits(struct kvm_vcpu *vcpu) > { > } > > +static bool svm_umip_emulated(void) > +{ > + return boot_cpu_has(X86_FEATURE_UMIP); > +} For hardware that supports UMIP, this is only needed because of your patch 1. Without it, X86_FEATURE_UMIP should already be enabled on processors that natively support UMIP. If you want UMIP *emulation* instead, this should become "return true". > static void update_cr0_intercept(struct vcpu_svm *svm) > { > ulong gcr0 = svm->vcpu.arch.cr0; > @@ -4438,6 +4443,13 @@ static int interrupt_window_interception(struct vcpu_svm *svm) > return 1; > } > > +static int umip_interception(struct vcpu_svm *svm) > +{ > + struct kvm_vcpu *vcpu = &svm->vcpu; > + > + return kvm_emulate_instruction(vcpu, 0); > +} > + > static int pause_interception(struct vcpu_svm *svm) > { > struct kvm_vcpu *vcpu = &svm->vcpu; > @@ -4775,6 +4787,10 @@ static int (*const svm_exit_handlers[])(struct vcpu_svm *svm) = { > [SVM_EXIT_SMI] = nop_on_interception, > [SVM_EXIT_INIT] = nop_on_interception, > [SVM_EXIT_VINTR] = interrupt_window_interception, > + [SVM_EXIT_IDTR_READ] = umip_interception, > + [SVM_EXIT_GDTR_READ] = umip_interception, > + [SVM_EXIT_LDTR_READ] = umip_interception, > + [SVM_EXIT_TR_READ] = umip_interception, This is missing enabling the intercepts. Also, this can be just emulate_on_interception instead of a new function. Paolo > [SVM_EXIT_RDPMC] = rdpmc_interception, > [SVM_EXIT_CPUID] = cpuid_interception, > [SVM_EXIT_IRET] = iret_interception, > @@ -5976,11 +5992,6 @@ static bool svm_xsaves_supported(void) > return boot_cpu_has(X86_FEATURE_XSAVES); > } > > -static bool svm_umip_emulated(void) > -{ > - return false; > -} > - > static bool svm_pt_supported(void) > { > return false; >