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[209.132.180.67]) by mx.google.com with ESMTP id k27si11236542ejk.231.2019.11.04.04.43.32; Mon, 04 Nov 2019 04:43:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=VWEgXD+h; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729277AbfKDMjx (ORCPT + 99 others); Mon, 4 Nov 2019 07:39:53 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:51368 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727267AbfKDMjw (ORCPT ); Mon, 4 Nov 2019 07:39:52 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id xA4Cdevb015174; Mon, 4 Nov 2019 06:39:40 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572871180; bh=EJK//JMShkFomcxIL7CoEODYJVjSFbKnvbLo+tDSL6s=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=VWEgXD+hyZ4I3aaLD1ZM9Lh2WE6oFBhRrvH83+pIIcQf27RivuRqqXyfCPp7CGNMW h3UKfnWvQfhqkiDUyWX8BGirplfL84p7t14e5ZXaBKswD5piT0OpDsyg3Sn2EK+6oN 4p44yjbIYT9U3bGDeN8jIsLoahK1gIG2cBe8fHhI= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xA4CdeNP088898 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 4 Nov 2019 06:39:40 -0600 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 4 Nov 2019 06:39:25 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 4 Nov 2019 06:39:25 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xA4CddDI007785; Mon, 4 Nov 2019 06:39:39 -0600 From: Dan Murphy To: , CC: , , Dan Murphy , Rob Herring , Tony Lindgren , =?UTF-8?q?Beno=C3=AEt=20Cousson?= , Linus Walleij , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Subject: [PATCH v16 18/19] dt: bindings: Update lp55xx binding to recommended LED naming Date: Mon, 4 Nov 2019 06:37:06 -0600 Message-ID: <20191104123707.31930-19-dmurphy@ti.com> X-Mailer: git-send-email 2.22.0.214.g8dca754b1e In-Reply-To: <20191104123707.31930-1-dmurphy@ti.com> References: <20191104123707.31930-1-dmurphy@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Update the LP55xx DT binding examples to the recommended node naming convention. There are no changes to the DT properties. Signed-off-by: Dan Murphy CC: Rob Herring CC: Tony Lindgren CC: "BenoƮt Cousson" CC: Linus Walleij CC: Shawn Guo CC: Sascha Hauer CC: Pengutronix Kernel Team CC: Fabio Estevam CC: NXP Linux Team --- .../devicetree/bindings/leds/leds-lp55xx.txt | 58 +++++++++---------- 1 file changed, 29 insertions(+), 29 deletions(-) diff --git a/Documentation/devicetree/bindings/leds/leds-lp55xx.txt b/Documentation/devicetree/bindings/leds/leds-lp55xx.txt index 0ccc1efc2499..5475f45ef51f 100644 --- a/Documentation/devicetree/bindings/leds/leds-lp55xx.txt +++ b/Documentation/devicetree/bindings/leds/leds-lp55xx.txt @@ -48,7 +48,7 @@ example 1) LP5521 'lp5521_pri:channel1' and 'lp5521_pri:channel2', with a heartbeat trigger on channel 0. -lp5521@32 { +led-controller@32 { #address-cells = <1>; #size-cells = <0>; compatible = "national,lp5521"; @@ -56,20 +56,20 @@ lp5521@32 { label = "lp5521_pri"; clock-mode = /bits/ 8 <2>; - chan@0 { + led@0 { reg = <0>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; linux,default-trigger = "heartbeat"; }; - chan@1 { + led@1 { reg = <1>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; }; - chan@2 { + led@2 { reg = <2>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; @@ -88,70 +88,70 @@ ASEL1 ASEL0 Address VEN GND 34h VEN VEN 35h -lp5523@32 { +led-controller@32 { #address-cells = <1>; #size-cells = <0>; compatible = "national,lp5523"; reg = <0x32>; clock-mode = /bits/ 8 <1>; - chan@0 { + led@0 { reg = <0>; chan-name = "d1"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@1 { + led@1 { reg = <1>; chan-name = "d2"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@2 { + led@2 { reg = <2>; chan-name = "d3"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@3 { + led@3 { reg = <3>; chan-name = "d4"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@4 { + led@4 { reg = <4>; chan-name = "d5"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@5 { + led@5 { reg = <5>; chan-name = "d6"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@6 { + led@6 { reg = <6>; chan-name = "d7"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@7 { + led@7 { reg = <7>; chan-name = "d8"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@8 { + led@8 { reg = <8>; chan-name = "d9"; led-cur = /bits/ 8 <0x14>; @@ -162,35 +162,35 @@ lp5523@32 { example 3) LP5562 4 channels are defined. -lp5562@30 { +led-controller@30 { #address-cells = <1>; #size-cells = <0>; compatible = "ti,lp5562"; reg = <0x30>; clock-mode = /bits/8 <2>; - chan@0 { + led@0 { reg = <0>; chan-name = "R"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; }; - chan@1 { + led@1 { reg = <1>; chan-name = "G"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; }; - chan@2 { + led@2 { reg = <2>; chan-name = "B"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; }; - chan@3 { + led@3 { reg = <3>; chan-name = "W"; led-cur = /bits/ 8 <0x20>; @@ -202,7 +202,7 @@ example 4) LP8501 9 channels are defined. The 'pwr-sel' is LP8501 specific property. Others are same as LP5523. -lp8501@32 { +led-controller@32 { #address-cells = <1>; #size-cells = <0>; compatible = "ti,lp8501"; @@ -210,63 +210,63 @@ lp8501@32 { clock-mode = /bits/ 8 <2>; pwr-sel = /bits/ 8 <3>; /* D1~9 connected to VOUT */ - chan@0 { + led@0 { reg = <0>; chan-name = "d1"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@1 { + led@1 { reg = <1>; chan-name = "d2"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@2 { + led@2 { reg = <2>; chan-name = "d3"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@3 { + led@3 { reg = <3>; chan-name = "d4"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@4 { + led@4 { reg = <4>; chan-name = "d5"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@5 { + led@5 { reg = <5>; chan-name = "d6"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@6 { + led@6 { reg = <6>; chan-name = "d7"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@7 { + led@7 { reg = <7>; chan-name = "d8"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@8 { + led@8 { reg = <8>; chan-name = "d9"; led-cur = /bits/ 8 <0x14>; -- 2.22.0.214.g8dca754b1e