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From:   Robert Richter <rrichter@marvell.com>
To:     Borislav Petkov <bp@alien8.de>
CC:     James Morse <james.morse@arm.com>,
        Mauro Carvalho Chehab <mchehab@kernel.org>,
        Tony Luck <tony.luck@intel.com>, Borislav Petkov <bp@suse.de>,
        "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] EDAC, ghes: Fix locking and memory barrier issues
Thread-Topic: [PATCH] EDAC, ghes: Fix locking and memory barrier issues
Thread-Index: AQHVk+PJuJh4Edfnxk+7GO+UiAR1Og==
Date:   Tue, 5 Nov 2019 14:17:42 +0000
Message-ID: <20191105141734.ubw5qegth3hdahls@rric.localdomain>
References: <20191025211226.2444-1-rrichter@marvell.com>
 <20191105110511.GA28418@zn.tnic>
In-Reply-To: <20191105110511.GA28418@zn.tnic>
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On 05.11.19 12:05:11, Borislav Petkov wrote:
> On Fri, Oct 25, 2019 at 09:13:14PM +0000, Robert Richter wrote:
> > The ghes registration and refcount is broken in several ways:
> >=20
> >  * ghes_edac_register() returns with success for a 2nd instance even
> >    if a first instance is still running.
>=20
> How?
>=20
> There's
>=20
>         if (atomic_inc_return(&ghes_init) > 1)
>                 return 0;
>=20
> there. How would a second instance bypass this?
>=20
> >  * The refcount was increased even if a registration failed. This
> >    leads to stale counters preventing the device from being released.
>=20
> That I see - the return path should dec ghes_init.

Here the bypass:

1) Entering ghes_edac_register(), instance #1

2) ghes_init atomicly set to 1, instance #1

3) Entering ghes_edac_register(), instance #2

4) ghes_init atomicly set to 2, instance #2

5) Leaving ghes_edac_register() with success, instance #2, note: First
   instance not yet done.

6) Leaving ghes_edac_register() with error, instance #1.

There are the following issues with this now:

1) Refcount is 2, though it should be zero as init failed with an
   error.

ghes_edac_register(), instance #2 returned already with success even
though:

2) ghes initialization was not yet done, and

3) ghes initialization is going to fail.

>=20
> >  * The ghes refcount may not be decremented properly on
> >    unregistration. Always decrement the refcount once
> >    ghes_edac_unregister() is called to keep the refcount sane.
>=20
> Right.
>=20
> >  * The ghes_pvt pointer is handed to the irq handler before
> >    registration finished.
> >=20
> >  * The mci structure could be freed while the irq handler is running.
> >=20
> > Fix this by adding a mutex to ghes_edac_register(). This mutex
> > serializes instances to register and unregister. The refcount is only
> > increased if the registration succeeded. This makes sure the refcount
> > is in a consistent state after registering or unregistering a device.
> > Note: A spinlock cannot be used here as the code section may sleep.
> >=20
> > The ghes_pvt is protected by ghes_lock now.
>=20
> This better be documented in the driver with a comment above the
> ghes_pvt thing.

Ok, will add a comment there.

>=20
> I'm assuming the support for multiple instances is going ontop of this?
> If so, ghes_pvt needs to be an array or so. Also, if you do that, I
> think you should use mc_devices - see edac_mc_find() et al - instead of
> growing a special one just for this driver.

Right, there will be a parent device created for each instance. But an
array is not required as this also can be part of the private data.
Only some sort of list head is needed to collect them all.

>=20
> > This ensures the pointer
> > is not updated before registration was finished or while the irq
> > handler is running. It is unset before unregistering the device
> > including necessary (implicit) memory barriers making the changes
> > visible to other cpus. Thus, the device can not be used anymore by an
> > interrupt.
> >=20
> > A refcount is needed. There can be multiple GHES structures being
> > defined (see ACPI 6.3 specification, 18.3.2.7 Generic Hardware Error
> > Source, "Some platforms may describe multiple Generic Hardware Error
> > Source structures with different notification types, ...").
> >=20
> > Another approach to use the mci's device refcount (get_device()) and
> > have a release function does not work here. A release function will be
> > called only for device_release() with the last put_device() call. The
> > device must be deleted *before* that with device_del(). This is only
> > possible by maintaining an own refcount.
> >=20
> > Fixes: 0fe5f281f749 ("EDAC, ghes: Model a single, logical memory contro=
ller")
> > Fixes: 1e72e673b9d1 ("EDAC/ghes: Fix Use after free in ghes_edac remove=
 path")
> > Signed-off-by: Borislav Petkov <bp@suse.de>
> > Signed-off-by: James Morse <james.morse@arm.com>
> > Signed-off-by: Robert Richter <rrichter@marvell.com>
> > ---
> >  drivers/edac/ghes_edac.c | 78 ++++++++++++++++++++++++++++------------
> >  1 file changed, 56 insertions(+), 22 deletions(-)
>=20
> ...
>=20
> > @@ -457,10 +461,12 @@ static struct acpi_platform_list plat_list[] =3D =
{
> >  int ghes_edac_register(struct ghes *ghes, struct device *dev)
> >  {
> >  	bool fake =3D false;
> > -	int rc, num_dimm =3D 0;
> > +	int rc =3D 0, num_dimm =3D 0;
> >  	struct mem_ctl_info *mci;
> > +	struct ghes_edac_pvt *pvt;
> >  	struct edac_mc_layer layers[1];
> >  	struct ghes_edac_dimm_fill dimm_fill;
> > +	unsigned long flags;
> >  	int idx =3D -1;
> > =20
> >  	if (IS_ENABLED(CONFIG_X86)) {
> > @@ -472,11 +478,14 @@ int ghes_edac_register(struct ghes *ghes, struct =
device *dev)
> >  		idx =3D 0;
> >  	}
> > =20
> > +	/* finish another registration/unregistration instance first */
> > +	mutex_lock(&ghes_reg_mutex);
> > +
> >  	/*
> >  	 * We have only one logical memory controller to which all DIMMs belo=
ng.
> >  	 */
> > -	if (atomic_inc_return(&ghes_init) > 1)
> > -		return 0;
> > +	if (atomic_inc_not_zero(&ghes_init))
>=20
> That should probably be called ghes_instances now to make it obvious
> what it is.

I already thought of renaming this to ghes_refcount.

>=20
> Also, you can make it a normal variable now since it is being modified
> under the mutex only.

I would rather avoid an own implementation of reference counting and
also better switch from atomic_* to refcount_* which also provides
range checks. There is no benefit doing this our own.

Any objections here for the renaming and using the refcount API?

>=20
> > +		goto unlock;
> > =20
> >  	/* Get the number of DIMMs */
> >  	dmi_walk(ghes_edac_count_dimms, &num_dimm);
> > @@ -494,12 +503,13 @@ int ghes_edac_register(struct ghes *ghes, struct =
device *dev)
> >  	mci =3D edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(struct gh=
es_edac_pvt));
> >  	if (!mci) {
> >  		pr_info("Can't allocate memory for EDAC data\n");
> > -		return -ENOMEM;
> > +		rc =3D -ENOMEM;
> > +		goto unlock;
> >  	}
> > =20
> > -	ghes_pvt	=3D mci->pvt_info;
> > -	ghes_pvt->ghes	=3D ghes;
> > -	ghes_pvt->mci	=3D mci;
> > +	pvt		=3D mci->pvt_info;
> > +	pvt->ghes	=3D ghes;
> > +	pvt->mci	=3D mci;
> > =20
> >  	mci->pdev =3D dev;
> >  	mci->mtype_cap =3D MEM_FLAG_EMPTY;
> > @@ -541,23 +551,47 @@ int ghes_edac_register(struct ghes *ghes, struct =
device *dev)
> >  	if (rc < 0) {
> >  		pr_info("Can't register at EDAC core\n");
> >  		edac_mc_free(mci);
> > -		return -ENODEV;
> > +		rc =3D -ENODEV;
>=20
> This needs to "goto unlock".

Umm, correct.

>=20
> >  	}
> > -	return 0;
> > +
> > +	spin_lock_irqsave(&ghes_lock, flags);
> > +	ghes_pvt =3D pvt;
> > +	spin_unlock_irqrestore(&ghes_lock, flags);
> > +
> > +	/* only increment on success */
> > +	atomic_inc(&ghes_init);
> > +
> > +unlock:
> > +	mutex_unlock(&ghes_reg_mutex);
> > +
> > +	return rc;
> >  }

Will, repost. Thanks for review.

-Robert