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Subject: Re: [PATCH 1/1] arm64: dts: sc7180: Add qupv3_0 and qupv3_1
To:     Roja Rani Yarubandi <rojay@codeaurora.org>,
        Andy Gross <agross@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>
Cc:     mgautam@codeaurora.org, akashast@codeaurora.org,
        msavaliy@codeaurora.org, sanm@codeaurora.org,
        skakit@codeaurora.org, linux-arm-msm@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
References: <20191031074500.28523-1-rojay@codeaurora.org>
 <20191031074500.28523-2-rojay@codeaurora.org>
From:   Rajendra Nayak <rnayak@codeaurora.org>
Message-ID: <13ad90c0-ff46-f85c-df5f-55e4985af76b@codeaurora.org>
Date:   Wed, 6 Nov 2019 08:23:31 +0530
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On 10/31/2019 1:15 PM, Roja Rani Yarubandi wrote:
> Add QUP SE instances configuration for sc7180.
> 
> Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
> ---
>   arch/arm64/boot/dts/qcom/sc7180-idp.dts | 152 +++++-
>   arch/arm64/boot/dts/qcom/sc7180.dtsi    | 683 +++++++++++++++++++++++-
>   2 files changed, 828 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts
> index e0724ef3317d..189254f5ae95 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts
> +++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts
[]..

>   
>   		tlmm: pinctrl@3500000 {
> @@ -230,12 +623,294 @@
[]..
> +
> +			qup_i2c0_default: qup-i2c0-default {
> +				pinmux {
> +					pins = "gpio34", "gpio35";
> +					function = "qup00";
> +				};
> +			};
> +
> +			qup_i2c1_default: qup-i2c1-default {
> +				pinmux {
> +					pins = "gpio0", "gpio1";
> +					function = "qup01";
> +				};
> +			};
> +
> +			qup_i2c2_default: qup-i2c2-default {
> +				pinmux {
> +					pins = "gpio15", "gpio16";
> +					function = "qup02";
> +				};
> +			};
> +
> +			qup_i2c3_default: qup-i2c3-default {
> +				pinmux {
> +					pins = "gpio38", "gpio39";
> +					function = "qup03";
> +				};
> +			};
> +
> +			qup_i2c4_default: qup-i2c4-default {
> +				pinmux {
> +					pins = "gpio115", "gpio116";
> +					function = "qup04";
> +				};
> +			};
> +
> +			qup_i2c5_default: qup-i2c5-default {
> +				pinmux {
> +					pins = "gpio25", "gpio26";
> +					function = "qup05";
> +				};
> +			};
> +
> +			qup_i2c6_default: qup-i2c6-default {
> +				pinmux {
> +					pins = "gpio59", "gpio60";
> +					function = "qup06";

The pinctrl driver has no functions named qup06/07/08/09
These are the qup functions listed

         FUNCTION(qup00),
         FUNCTION(qup01),
         FUNCTION(qup02),
         FUNCTION(qup03),
         FUNCTION(qup04),
         FUNCTION(qup05),
         FUNCTION(qup10),
         FUNCTION(qup11),
         FUNCTION(qup12),
         FUNCTION(qup13),
         FUNCTION(qup14),
         FUNCTION(qup15),

> +				};
> +			};
> +
> +			qup_i2c7_default: qup-i2c7-default {
> +				pinmux {
> +					pins = "gpio6", "gpio7";
> +					function = "qup07";
> +				};
> +			};
> +
> +			qup_i2c8_default: qup-i2c8-default {
> +				pinmux {
> +					pins = "gpio42", "gpio43";
> +					function = "qup08";
> +				};
> +			};
> +
> +			qup_i2c9_default: qup-i2c9-default {
> +				pinmux {
> +					pins = "gpio46", "gpio47";
> +					function = "qup09";
> +				};
> +			};
> +
> +			qup_i2c10_default: qup-i2c10-default {
> +				pinmux {
> +					pins = "gpio86", "gpio87";
> +					function = "qup10";
> +				};
> +			};
> +
> +			qup_i2c11_default: qup-i2c11-default {
> +				pinmux {
> +					pins = "gpio53", "gpio54";
> +					function = "qup11";
> +				};
> +			};
> +
> +			qup_spi0_default: qup-spi0-default {
> +				pinmux {
> +					pins = "gpio34", "gpio35",
> +					       "gpio36", "gpio37";
> +					function = "qup00";
> +				};
> +			};
> +
> +			qup_spi1_default: qup-spi1-default {
> +				pinmux {
> +					pins = "gpio0", "gpio1",
> +					       "gpio2", "gpio3",
> +					       "gpio12", "gpio94";
> +					function = "qup01";
> +				};
> +			};
> +
> +			qup_spi3_default: qup-spi3-default {
> +				pinmux {
> +					pins = "gpio38", "gpio39",
> +					       "gpio40", "gpio41";
> +					function = "qup03";
> +				};
> +			};
> +
> +			qup_spi5_default: qup-spi5-default {
> +				pinmux {
> +					pins = "gpio25", "gpio26",
> +					       "gpio27", "gpio28";
> +					function = "qup05";
> +				};
> +			};
> +
> +			qup_spi6_default: qup-spi6-default {
> +				pinmux {
> +					pins = "gpio59", "gpio60",
> +					       "gpio61", "gpio62",
> +					       "gpio68", "gpio72";
> +					function = "qup06";
> +				};
> +			};
> +
> +			qup_spi8_default: qup-spi8-default {
> +				pinmux {
> +					pins = "gpio42", "gpio43",
> +					       "gpio44", "gpio45";
> +					function = "qup08";
> +				};
> +			};
> +
> +			qup_spi10_default: qup-spi10-default {
> +				pinmux {
> +					pins = "gpio86", "gpio87",
> +					       "gpio88", "gpio89",
> +					       "gpio90", "gpio91";
> +					function = "qup10";
> +				};
> +			};
> +
> +			qup_spi11_default: qup-spi11-default {
> +				pinmux {
> +					pins = "gpio53", "gpio54",
> +					       "gpio55", "gpio56";
> +					function = "qup11";
> +				};
> +			};
> +
> +			qup_uart0_default: qup-uart0-default {
> +				pinmux {
> +					pins = "gpio34", "gpio35",
> +					       "gpio36", "gpio37";
> +					function = "qup00";
> +				};
> +			};
> +
> +			qup_uart1_default: qup-uart1-default {
> +				pinmux {
> +					pins = "gpio0", "gpio1",
> +					       "gpio2", "gpio3";
> +					function = "qup01";
> +				};
> +			};
> +
> +			qup_uart2_default: qup-uart2-default {
> +				pinmux {
> +					pins = "gpio15", "gpio16";
> +					function = "qup02";
> +				};
> +			};
> +
> +			qup_uart3_default: qup-uart3-default {
> +				pinmux {
> +					pins = "gpio38", "gpio39",
> +					       "gpio40", "gpio41";
> +					function = "qup03";
> +				};
> +			};
> +
> +			qup_uart4_default: qup-uart4-default {
> +				pinmux {
> +					pins = "gpio115", "gpio116";
> +					function = "qup04";
> +				};
> +			};
> +
> +			qup_uart5_default: qup-uart5-default {
> +				pinmux {
> +					pins = "gpio25", "gpio26",
> +					       "gpio27", "gpio28";
> +					function = "qup05";
> +				};
> +			};
> +
> +			qup_uart6_default: qup-uart6-default {
> +				pinmux {
> +					pins = "gpio59", "gpio60",
> +					       "gpio61", "gpio62";
> +					function = "qup06";
> +				};
> +			};
> +
> +			qup_uart7_default: qup-uart7-default {
> +				pinmux {
> +					pins = "gpio6", "gpio7";
> +					function = "qup07";
> +				};
> +			};
> +
> +			qup_uart8_default: qup-uart8-default {
>   				pinmux {
>   					pins = "gpio44", "gpio45";
> -					function = "qup12";
> +					function = "qup08";
> +				};
> +			};
> +
> +			qup_uart9_default: qup-uart9-default {
> +				pinmux {
> +					pins = "gpio46", "gpio47";
> +					function = "qup09";
>   				};
>   			};
> +
> +			qup_uart10_default: qup-uart10-default {
> +				pinmux {
> +					pins = "gpio86", "gpio87",
> +					       "gpio88", "gpio89";
> +					function = "qup10";
> +				};
> +			};
> +
> +			qup_uart11_default: qup-uart11-default {
> +				pinmux {
> +					pins = "gpio53", "gpio54",
> +					       "gpio55", "gpio56";
> +					function = "qup11";
> +				};
> +			};
> +		};
> +
> +		qspi: spi@88dc000 {
> +			compatible = "qcom,qspi-v1";
> +			reg = <0 0x088dc000 0 0x600>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
> +				 <&gcc GCC_QSPI_CORE_CLK>;
> +			clock-names = "iface", "core";
> +			status = "disabled";
>   		};
>   
>   		spmi_bus: spmi@c440000 {
> 

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