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Wed, 6 Nov 2019 09:33:27 +0000 Received: from MN2PR18MB3408.namprd18.prod.outlook.com ([fe80::c4a:cf3c:f530:fba6]) by MN2PR18MB3408.namprd18.prod.outlook.com ([fe80::c4a:cf3c:f530:fba6%6]) with mapi id 15.20.2430.020; Wed, 6 Nov 2019 09:33:27 +0000 From: Robert Richter To: Borislav Petkov , Mauro Carvalho Chehab , Tony Luck CC: James Morse , Robert Richter , "linux-edac@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "Mauro Carvalho Chehab" Subject: [PATCH v2 12/20] EDAC, ghes: Unify trace_mc_event() code with edac_mc driver Thread-Topic: [PATCH v2 12/20] EDAC, ghes: Unify trace_mc_event() code with edac_mc driver Thread-Index: AQHVlIU+HDuE1rmeak2rq0BZPausfA== Date: Wed, 6 Nov 2019 09:33:27 +0000 Message-ID: <20191106093239.25517-13-rrichter@marvell.com> References: <20191106093239.25517-1-rrichter@marvell.com> In-Reply-To: <20191106093239.25517-1-rrichter@marvell.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HE1PR05CA0287.eurprd05.prod.outlook.com (2603:10a6:7:93::18) To MN2PR18MB3408.namprd18.prod.outlook.com (2603:10b6:208:165::10) x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.20.1 x-originating-ip: [31.208.96.227] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: b89a4bef-3b57-4150-c509-08d7629c60c6 x-ms-traffictypediagnostic: MN2PR18MB3165: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:5236; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: b89a4bef-3b57-4150-c509-08d7629c60c6 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2019 09:33:27.6662 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: fAZ3Kamb4MGn1C5JsJpmXfD94d/c9v9C2VizUEwykmolpoG0R8uoNIntb5DOJtrNI5qNXb23bACtN+8FhwGZvw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR18MB3165 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,18.0.572 definitions=2019-11-06_02:2019-11-06,2019-11-06 signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The code in ghes_edac.c and edac_mc.c for grain_bits calculation and calling trace_mc_event() is now the same. Move it to a single location in edac_raw_mc_handle_error(). The only difference is the missing IS_ENABLED(CONFIG_RAS) switch, but this is needed for ghes too. Signed-off-by: Robert Richter Reviewed-by: Mauro Carvalho Chehab --- drivers/edac/edac_mc.c | 30 +++++++++++++++--------------- drivers/edac/ghes_edac.c | 13 ------------- 2 files changed, 15 insertions(+), 28 deletions(-) diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index f76252b7a787..b6032f51338e 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c @@ -1057,6 +1057,21 @@ void edac_raw_mc_handle_error(const enum hw_event_mc= _err_type type, { char detail[80]; int pos[EDAC_MAX_LAYERS] =3D { e->top_layer, e->mid_layer, e->low_layer }= ; + u8 grain_bits; + + /* Sanity-check driver-supplied grain value. */ + if (WARN_ON_ONCE(!e->grain)) + e->grain =3D 1; + + grain_bits =3D fls_long(e->grain - 1); + + /* Report the error via the trace interface */ + if (IS_ENABLED(CONFIG_RAS)) + trace_mc_event(type, e->msg, e->label, e->error_count, + mci->mc_idx, e->top_layer, e->mid_layer, + e->low_layer, + (e->page_frame_number << PAGE_SHIFT) | e->offset_in_page, + grain_bits, e->syndrome, e->other_detail); =20 /* Memory type dependent details about the error */ if (type =3D=3D HW_EVENT_ERR_CORRECTED) { @@ -1097,7 +1112,6 @@ void edac_mc_handle_error(const enum hw_event_mc_err_= type type, int row =3D -1, chan =3D -1; int pos[EDAC_MAX_LAYERS] =3D { top_layer, mid_layer, low_layer }; int i, n_labels =3D 0; - u8 grain_bits; struct edac_raw_error_desc *e =3D &mci->error_desc; =20 edac_dbg(3, "MC%d\n", mci->mc_idx); @@ -1235,20 +1249,6 @@ void edac_mc_handle_error(const enum hw_event_mc_err= _type type, if (p > e->location) *(p - 1) =3D '\0'; =20 - /* Sanity-check driver-supplied grain value. */ - if (WARN_ON_ONCE(!e->grain)) - e->grain =3D 1; - - grain_bits =3D fls_long(e->grain - 1); - - /* Report the error via the trace interface */ - if (IS_ENABLED(CONFIG_RAS)) - trace_mc_event(type, e->msg, e->label, e->error_count, - mci->mc_idx, e->top_layer, e->mid_layer, - e->low_layer, - (e->page_frame_number << PAGE_SHIFT) | e->offset_in_page, - grain_bits, e->syndrome, e->other_detail); - edac_raw_mc_handle_error(type, mci, e); } EXPORT_SYMBOL_GPL(edac_mc_handle_error); diff --git a/drivers/edac/ghes_edac.c b/drivers/edac/ghes_edac.c index cb1ab44361f0..725b9c58c028 100644 --- a/drivers/edac/ghes_edac.c +++ b/drivers/edac/ghes_edac.c @@ -207,7 +207,6 @@ void ghes_edac_report_mem_error(int sev, struct cper_se= c_mem_err *mem_err) struct ghes_edac_pvt *pvt; unsigned long flags; char *p; - u8 grain_bits; =20 /* * We can do the locking below because GHES defers error processing @@ -443,18 +442,6 @@ void ghes_edac_report_mem_error(int sev, struct cper_s= ec_mem_err *mem_err) if (p > pvt->other_detail) *(p - 1) =3D '\0'; =20 - /* Sanity-check driver-supplied grain value. */ - if (WARN_ON_ONCE(!e->grain)) - e->grain =3D 1; - - grain_bits =3D fls_long(e->grain - 1); - - /* Generate the trace event */ - trace_mc_event(type, e->msg, e->label, e->error_count, - mci->mc_idx, e->top_layer, e->mid_layer, e->low_layer, - (e->page_frame_number << PAGE_SHIFT) | e->offset_in_page, - grain_bits, e->syndrome, e->other_detail); - edac_raw_mc_handle_error(type, mci, e); unlock: spin_unlock_irqrestore(&ghes_lock, flags); --=20 2.20.1