Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
From:   Rain Wang <Rain_Wang@Jabil.com>
To:     Guenter Roeck <linux@roeck-us.net>, Jean Delvare <jdelvare@suse.de>
CC:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-hwmon@vger.kernel.org" <linux-hwmon@vger.kernel.org>
Subject: Re: [PATCH] lm75: add lm75b detection
Thread-Topic: [PATCH] lm75: add lm75b detection
Thread-Index: AQHVi9TmDrxen4j80EuOn1QRxLtsQKdvHeCAgACzjQCAAdoIgIANoKcB
Date:   Thu, 7 Nov 2019 06:18:01 +0000
Message-ID: <MN2PR02MB67038B3F8DF699BD0C462C458D780@MN2PR02MB6703.namprd02.prod.outlook.com>
References: <20191026081049.GA16839@rainw-fedora28-jabil.corp.JABIL.ORG>
 <7a2ddf42-8bbe-59e0-dae8-85b184ea0da0@roeck-us.net>
 <20191028104618.5f21af38@endymion>,<82a0b331-daa0-af9a-a7d0-0f1b3246ea49@roeck-us.net>
In-Reply-To: <82a0b331-daa0-af9a-a7d0-0f1b3246ea49@roeck-us.net>
Accept-Language: en-US
Content-Language: en-US
received-spf: None (protection.outlook.com: Jabil.com does not designate
 permitted sender hosts)
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
X-MS-Exchange-CrossTenant-Network-Message-Id: 021d2cd1-882a-4c20-7c21-08d7634a3e38
X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Nov 2019 06:18:01.7051
 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: bc876b21-f134-4c12-a265-8ed26b7f0f3b
X-MS-Exchange-CrossTenant-mailboxtype: HOSTED
X-MS-Exchange-CrossTenant-userprincipalname: laqCESImwgGadcHZTAjWoUWau/mJFBapHa3O0dTtXx7e6Xvl6RH4smIXnO8bnuZRPwVRQKPDMNDR0uDF+7iZgQ==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR02MB7055
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Sorry for my late reply, =0A=
=0A=
>FWIW, I don't think there is anything to implement; I don't see any=0A=
>differences in functionality.=0A=
Yes, no functional difference but the detection=0A=
=0A=
>I am much more concerned about weakening the already weak detection even f=
urther:=0A=
>As written, each chip with register 0x07 !=3D 0xa1 will be identified as L=
M75B.=0A=
>Even if that was strengthened to actually check if the register value is 0=
xff,=0A=
>we have no idea what other vendors might implement in those registers. it =
would=0A=
>most certainly mis-identify LM75C as LM75B. Not that it really matters if=
=0A=
>the chip _is_ a LM75C, but who knows if other chips fit that identificatio=
n=0A=
>pattern.=0A=
Yes, that's also my concern on the code of detection. I don't have any othe=
r sensors as=0A=
LM75C to try, so thinking maybe some other guys can help extend it if neede=
d in future.=0A=
=0A=
>Overall, my suggestion is to add a small startup script to affected system=
s=0A=
>to instantiate the chip directly, and avoid weakening the detect function.=
=0A=
Understood, we can have the instantiating script but just don't want limit =
the detection.=0A=
Thanks!=