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Date:   Thu, 7 Nov 2019 16:04:31 +0100
From:   Peter Zijlstra <peterz@infradead.org>
To:     Ganapatrao Kulkarni <gklkml16@gmail.com>
Cc:     Mark Rutland <mark.rutland@arm.com>,
        Ganapatrao Prabhakerrao Kulkarni <gkulkarni@marvell.com>,
        "linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        "mingo@redhat.com" <mingo@redhat.com>,
        "will@kernel.org" <will@kernel.org>,
        "corbet@lwn.net" <corbet@lwn.net>
Subject: Re: [PATCH 1/2] perf/core: Adding capability to disable PMUs event
 multiplexing
Message-ID: <20191107150431.GC4114@hirez.programming.kicks-ass.net>
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 <20191106112810.GA50610@lakrids.cambridge.arm.com>
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On Wed, Nov 06, 2019 at 03:28:46PM -0800, Ganapatrao Kulkarni wrote:
> Issue happens when the add and del are called too many times as seen
> with 6 event case.
> The PMU hardware control registers are programmed when add and del
> functions are called.
> For pmu->read no issues since no h/w issue with the data path.
> 
> Please suggest me, how can we fix this in back-end PMU driver without
> any perf core help?

As Mark already said, a (much) better description of the actual hardware
fail is required, but one possible solution would be to add a busy spin
delay when writing to the hardware registers.

Something like:

	u64 now, ts = this_cpu_read(tx2_throttle);

	while ((now = cycle_counter()) <= ts)
		cpu_relax();

	write_register(...);

	this_cpu_write(tx2_throttle, now + delay_ns);

Other known tricks include reading the register back until it contains
what you just wrote to it.

But really, first properly describe how your hardware is buggered.