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[209.85.208.171]) by smtp.gmail.com with ESMTPSA id k19sm1630329ljg.18.2019.11.07.11.54.32 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 07 Nov 2019 11:54:32 -0800 (PST) Received: by mail-lj1-f171.google.com with SMTP id g3so3623163ljl.11 for ; Thu, 07 Nov 2019 11:54:32 -0800 (PST) X-Received: by 2002:a2e:2c19:: with SMTP id s25mr3777487ljs.26.1573156471860; Thu, 07 Nov 2019 11:54:31 -0800 (PST) MIME-Version: 1.0 References: <20191106193459.581614484@linutronix.de> <20191106202806.241007755@linutronix.de> In-Reply-To: From: Linus Torvalds Date: Thu, 7 Nov 2019 11:54:15 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [patch 5/9] x86/ioport: Reduce ioperm impact for sane usage further To: Brian Gerst Cc: Thomas Gleixner , LKML , "the arch/x86 maintainers" , Stephen Hemminger , Willy Tarreau , Juergen Gross , Sean Christopherson , "H. Peter Anvin" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Nov 7, 2019 at 11:24 AM Brian Gerst wrote: > > Here is a different idea: We already map the TSS virtually in > cpu_entry_area. Why not page-align the IO bitmap and remap it to the > task's bitmap on task switch? That would avoid all copying on task > switch. We map the tss _once_, statically, percpu, without ever changing it, and then we just (potentially) change a couple of fields in it on process switch. Your idea isn't horrible, but it would involve a TLB flush for the page when the io bitmap changes. Which is almost certainly more expensive than just copying the bitmap intelligently. Particularly since I do think that the copy can basically be done effectively never, assuming there really aren't multiple concurrent users of ioperm() (and iopl). Linus