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From:   Rob Herring <robh+dt@kernel.org>
Date:   Thu, 7 Nov 2019 15:45:12 -0600
Message-ID: <CAL_JsqL5_6vLJ4sfaNr=76S8kDWEpfKT05xaLktqFM_xH3puGA@mail.gmail.com>
Subject: Re: [PATCH v4 6/9] usb: dwc3: Rework resets initialization to be more flexible
To:     Felipe Balbi <balbi@kernel.org>
Cc:     John Stultz <john.stultz@linaro.org>,
        lkml <linux-kernel@vger.kernel.org>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Mark Rutland <mark.rutland@arm.com>,
        ShuFan Lee <shufan_lee@richtek.com>,
        Heikki Krogerus <heikki.krogerus@linux.intel.com>,
        Suzuki K Poulose <suzuki.poulose@arm.com>,
        Chunfeng Yun <chunfeng.yun@mediatek.com>,
        Yu Chen <chenyu56@huawei.com>,
        Hans de Goede <hdegoede@redhat.com>,
        Andy Shevchenko <andy.shevchenko@gmail.com>,
        Jun Li <lijun.kernel@gmail.com>,
        Valentin Schneider <valentin.schneider@arm.com>,
        Jack Pham <jackp@codeaurora.org>,
        Linux USB List <linux-usb@vger.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>
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On Wed, Oct 30, 2019 at 4:01 AM Felipe Balbi <balbi@kernel.org> wrote:
>
>
> Hi,
>
> John Stultz <john.stultz@linaro.org> writes:
>
> > On Tue, Oct 29, 2019 at 2:17 AM Felipe Balbi <balbi@kernel.org> wrote:
> >> John Stultz <john.stultz@linaro.org> writes:
> >> > The dwc3 core binding specifies one reset.
> >> >
> >> > However some variants of the hardware my not have more.
> >>                                         ^^
> >>                                         may
> >>
> >> According to synopsys databook, there's a single *input* reset signal on
> >> this IP. What is this extra reset you have?
> >>
> >> Is this, perhaps, specific to your glue layer around the synopsys ip?
> >
> > Likely (again, I unfortunately don't have a ton of detail on the hardware).
> >
> >> Should, perhaps, your extra reset be managed by the glue layer?

An extra clock or reset is a silly reason to have a whole other node
and driver. If there's additional blocks and registers, then yes a
glue node makes sense.

> > So yes the dwc3-of-simple does much of this already (it handles
> > multiple resets, and variable clocks), but unfortunately we seem to
> > need new bindings for each device added?  I think the suggestion from
> > Rob was due to the sprawl of bindings for the glue code, and the extra
> > complexity of the parent node.  So I believe Rob just thought it made
> > sense to collapse this down into the core?
> >
> > I'm not really passionate about either approach, and am happy to
> > rework (as long as there is eventual progress :).
> > Just let me know what you'd prefer.
>
> Well, I was under the impression we were supposed to describe the
> HW. Synopsys IP has a single reset input :-p

John is. His chip requires 2 resets to use the USB block and the
compatible provides that distinction. Maybe HiSilicon has a newer or
customized IP version that has 2 resets. The block could have external
RAMs (because every process has its own) which may have their own
reset. With NDA specifications and little knowledge of the full
revision history, we can really never know. Also, omitting clocks and
resets from the dwc3 node entirely is just as much not describing the
h/w (only the glue needs clocks?).

This block is the oddball. I think there's 1 or 2 other blocks where
this glue node was done, but please stop. If we did this every time
there's a variation in clocks or resets, we'd pretty much have glue
nodes everywhere.

Rob