Received: by 2002:a25:31c3:0:0:0:0:0 with SMTP id x186csp2188464ybx; Fri, 8 Nov 2019 01:04:26 -0800 (PST) X-Google-Smtp-Source: APXvYqy8FXVRqV6hk6Hu/6Bld3COimIwjGVc/mwIOtUbSwphZOX85ry05VXiGPru76U9wVitmWt6 X-Received: by 2002:a17:907:384:: with SMTP id ss4mr5585912ejb.132.1573203866268; Fri, 08 Nov 2019 01:04:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573203866; cv=none; d=google.com; s=arc-20160816; b=kQcWnyNUl7mA19JENp5ALsZSWygpd03fX/roX+SO0Yo+M1rHyoPdk6BD0Zjzp06+yl ZLKfsZTjJz1Wfu6nG+pERmXVcdhvsGN4Q4MgIWhdjnByH1eenCBWET15Lr87nfK++WZj zvw2WuZN73RFH6y8v1kbi40wUnb5YWoNoKJ6vfPnWavIejgLiwUhmJwEtACe97jVo/x2 rWcLfCGdoa5V0WIEMeJ8DdkJb33TdhEP2+x1HviLnX+gepYPPD3X5bO2sQuOus8TrLgY pkYi4d9/eSure/L7dS4w/fc17thcyPm5VyKx5M7wpu/giUbHX89de1K/6lBimsq6Gf59 itEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=yyme4xF7z9KBPUqLR7oEw7YqaJyK0uY98RXkSj+tPLM=; b=OlEMOm7xbAbgKVMoBTvTDUSL5Lrrd/Ws2+b2acic2BRCupShG3z/zJDrSiUXN4sMc8 Pj/U84dGt6u2jF4Y3tdXjI5+jBNPzqjWwEJZasw0DGan4aCPWunHlu22b2k/7jTrojnE UjvMjwM9KNucG/5t/T0dGRTzpOKKDrSGL6KeliDJQ/Wg1qTA/0IEg63fPOwISUqNY/df apuV4jkFgWn1ijBMPSuNITAUuzHcb58ySZtuGczDtaHDFU14gvXDJBUpAUrAyjpGh4PA tMpB98o6iNbwdjYpkoQys/keZQ73vctiP4fkAVpQllds3/i70f/nfHfagyZDyEtbD8JK R59Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o5si3319740ejn.123.2019.11.08.01.04.02; Fri, 08 Nov 2019 01:04:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731233AbfKHJAz (ORCPT + 99 others); Fri, 8 Nov 2019 04:00:55 -0500 Received: from mail-sz.amlogic.com ([211.162.65.117]:18424 "EHLO mail-sz.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730989AbfKHJAw (ORCPT ); Fri, 8 Nov 2019 04:00:52 -0500 Received: from localhost.localdomain (10.28.8.19) by mail-sz.amlogic.com (10.28.11.5) with Microsoft SMTP Server id 15.1.1591.10; Fri, 8 Nov 2019 17:00:58 +0800 From: Qianggui Song To: Linus Walleij , CC: Qianggui Song , Neil Armstrong , Jerome Brunet , Kevin Hilman , Martin Blumenstingl , Carlo Caione , Rob Herring , Xingyu Chen , Jianxin Pan , Hanjie Lin , Mark Rutland , , , , Subject: [PATCH v5 3/3] arm64: dts: meson: a1: add pinctrl controller support Date: Fri, 8 Nov 2019 17:00:36 +0800 Message-ID: <1573203636-7436-4-git-send-email-qianggui.song@amlogic.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1573203636-7436-1-git-send-email-qianggui.song@amlogic.com> References: <1573203636-7436-1-git-send-email-qianggui.song@amlogic.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.28.8.19] Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org add peripheral pinctrl controller to a1 SoC Signed-off-by: Qianggui Song --- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi index 7210ad049d1d..0965259af869 100644 --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -5,6 +5,7 @@ #include #include +#include / { compatible = "amlogic,a1"; @@ -74,6 +75,23 @@ #size-cells = <2>; ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x1000000>; + periphs_pinctrl: pinctrl@0400 { + compatible = "amlogic,meson-a1-periphs-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gpio: bank@0400 { + reg = <0x0 0x0400 0x0 0x003c>, + <0x0 0x0480 0x0 0x0118>; + reg-names = "mux", "gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 0 62>; + }; + + }; + uart_AO: serial@1c00 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; -- 1.9.1