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Subject: Re: [PATCH V4 net-next 0/4] net: ethernet: stmmac: cleanup clock and
 optimization
To:     David Miller <davem@davemloft.net>, <christophe.roullier@st.com>
CC:     <robh@kernel.org>, <joabreu@synopsys.com>, <mark.rutland@arm.com>,
        <mcoquelin.stm32@gmail.com>, <peppe.cavallaro@st.com>,
        <linux-stm32@st-md-mailman.stormreply.com>,
        <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>, <netdev@vger.kernel.org>,
        <andrew@lunn.ch>
References: <20191107084757.17910-1-christophe.roullier@st.com>
 <20191107.152640.1457462659040029467.davem@davemloft.net>
From:   Alexandre Torgue <alexandre.torgue@st.com>
Message-ID: <8c4efcce-b46f-ac94-a367-50ff5d78c8a2@st.com>
Date:   Fri, 8 Nov 2019 11:35:23 +0100
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Hi David

On 11/8/19 12:26 AM, David Miller wrote:
> From: Christophe Roullier <christophe.roullier@st.com>
> Date: Thu, 7 Nov 2019 09:47:53 +0100
> 
>> Some improvements:
>>   - manage syscfg as optional clock,
>>   - update slew rate of ETH_MDIO pin,
>>   - Enable gating of the MAC TX clock during TX low-power mode
>>
>> V4: Update with Andrew Lunn remark
> 
> This is mostly ARM DT updates, which tree should this go through?
> 
> I don't want to step on toes this time :-)
> 

I'll take DT patches in my STM32 tree.

Thanks
Alex