Received: by 2002:a25:31c3:0:0:0:0:0 with SMTP id x186csp2750402ybx; Fri, 8 Nov 2019 08:49:26 -0800 (PST) X-Google-Smtp-Source: APXvYqxnT/lTvmdiKhRAim8V/W81n0cbYn8QU/jhyC5vqTtF4M8z8Dxc0YfEdKJ6Cy+xxwrrdct7 X-Received: by 2002:a17:906:245b:: with SMTP id a27mr9854673ejb.192.1573231766326; Fri, 08 Nov 2019 08:49:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573231766; cv=none; d=google.com; s=arc-20160816; b=aRY27W6uB8w/wrl/fXetrFT9BkaN3yII4Klzz2druzrnkBM5tD08HXhuQ728LGATIT ZThrgLcpdD6s7eTcYioFWPAlarPRTElVA8JcumxBnTT0bguHHEeZyDdNe7dyduN3IT0U zBoFOGcpHHKh252z+WHVeg0ThUsaTndG4zUmuMWKB8wRQhnBdgziN416PngOA/dkLrdH 9Gfv5ABkKrC5+kLIuGSPmoJSsmmpyHAAA4rjlgbUAmoc5KosauoFP6kPQPr2Ld8Ze+gk M5Xc0E/sM9RtqXr3BceSrIVGzPhYCLuWdtQFKnnaZe3VMVa3V1miYjGLWuFlfRcc1XZf A2Yg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=uqJoNN6OnOhakDhNgeRHSN8Fh6Gdv0BbzDpr6qjrzVc=; b=kS9b898jbGqYjiLWkZQmKd1sXZO2g2CPmyKYNf8G0VYwiXgD6sL547Nfsc+6kzeIk+ 7KvpbniO+g8s1nAkOSGqB4h9ZeG7bycATevK5lfIMykAcHmdNUEKuavZvXMAncwGphgS zOdGoYQbpNOludS86viAGx1BPlMtUCLvUyntK4kGPVT3r9g+P225GLHZrTduGclBS/wu odHXo8Bwi2YCO/E5FzcsSq9tpk8kHyBz3YFiS9Sz8XlTDnqToTS+iDw1cIc2Xe+jg8oy NBpSYdvguQxzLTqbb4tvOMejxxLB2Hyb1yVOnI+QhgAbu1ABa+c8a+6Lu5U7oCkOXb93 PORQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r21si4077287ejo.151.2019.11.08.08.49.03; Fri, 08 Nov 2019 08:49:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727895AbfKHQpt (ORCPT + 99 others); Fri, 8 Nov 2019 11:45:49 -0500 Received: from muru.com ([72.249.23.125]:40840 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726039AbfKHQps (ORCPT ); Fri, 8 Nov 2019 11:45:48 -0500 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id 5C24280D4; Fri, 8 Nov 2019 16:46:22 +0000 (UTC) Date: Fri, 8 Nov 2019 08:45:43 -0800 From: Tony Lindgren To: "H. Nikolaus Schaller" Cc: Rob Herring , David Airlie , Daniel Vetter , Mark Rutland , =?utf-8?Q?Beno=C3=AEt?= Cousson , Paul Cercueil , Ralf Baechle , Paul Burton , James Hogan , dri-devel , devicetree , "linux-kernel@vger.kernel.org" , linux-omap , OpenPVRSGX Linux Driver Group , Discussions about the Letux Kernel , kernel@pyra-handheld.com, "open list:MIPS" Subject: Re: [PATCH v2 1/8] RFC: dt-bindings: add img,pvrsgx.yaml for Imagination GPUs Message-ID: <20191108164543.GD5610@atomide.com> References: <4292cec1fd82cbd7d42742d749557adb01705574.1573124770.git.hns@goldelico.com> <52549A4C-F49D-4FE9-9CD2-B331FB486BA9@goldelico.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <52549A4C-F49D-4FE9-9CD2-B331FB486BA9@goldelico.com> User-Agent: Mutt/1.12.1 (2019-06-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * H. Nikolaus Schaller [191107 16:56]: > > Am 07.11.2019 um 15:35 schrieb Rob Herring : > > On Thu, Nov 7, 2019 at 5:06 AM H. Nikolaus Schaller wrote: > >> Clock, Reset and power management should be handled > >> by a parent node or elsewhere. > > > > That's probably TI specific... > > Yes and no. > > For example the img4780 seems to need a clock reference in the > gpu node. But it could maybe connected in a parent node like recent > TI SoC do with the target-module approach. The clocks are implemented at the SoC glue layer and/or the interconnect layer, and then the device probably has it's own clock gate controls. > And our goal is to end up with a common driver for all SoC and architectures > in far future. Then, probably clock, reset and power management should > be handled in the same way. Yeah so that's standard Linux features such as PM runtime and genpd basically :) So you can just leave out the clocks paragraph from the binding. Then if clocks are really needed beyond PM runtime and genpd, those can always be added later. We just need a super minimal binding to start with that only uses standard properties, then more can be added later if needed. Regards, Tony