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Mon, 11 Nov 2019 00:17:24 -0800 (PST) Received: from dell ([95.147.198.88]) by smtp.gmail.com with ESMTPSA id i71sm31948761wri.68.2019.11.11.00.17.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Nov 2019 00:17:24 -0800 (PST) Date: Mon, 11 Nov 2019 08:17:17 +0000 From: Lee Jones To: Linus Walleij Cc: linux-kernel@vger.kernel.org, arm@kernel.org, Stephan Gerhold Subject: Re: [PATCH v3] mfd: db8500-prcmu: Support U8420-sysclk firmware Message-ID: <20191111081717.GG18902@dell> References: <20191026214732.17725-1-linus.walleij@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20191026214732.17725-1-linus.walleij@linaro.org> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, 26 Oct 2019, Linus Walleij wrote: > There is a distinct version of the Ux500 U8420 variant > with "sysclk", as can be seen from the vendor code that > didn't make it upstream, this firmware lacks the > ULPPLL (ultra-low power phase locked loop) which in > effect means that the timer clock is instead wired to > the 32768 Hz always-on clock. > > This has some repercussions when enabling the timer > clock as the code as it stands will disable the timer > clock on these platforms (lacking the so-called > "doze mode") and obtaining the wrong rate of the timer > clock. > > The timer frequency is of course needed very early in > the boot, and as a consequence, we need to shuffle > around the early PRCMU init code: whereas in the past > we did not need to look up the PRCMU firmware version > in the early init, but now we need to know the version > before the core system timers are registered so we > restructure the platform callbacks to the PRCMU so as > not to take any arguments and instead look up the > resources it needs directly from the device tree > when initializing. > > As we do not yet support any platforms using this > firmware it is not a regression, but as PostmarketOS > is starting to support products with this firmware we > need to fix this up. > > The low rate of 32kHz also makes the MTU timer unsuitable > as delay timer but this needs to be fixed in a separate > patch. > > Cc: arm@kernel.org > Cc: Lee Jones > Cc: Stephan Gerhold > Signed-off-by: Linus Walleij > --- > ChangeLog v2->v3: > - It's a bad idead to return -ENODEV in a function > that returns void. > ChangeLog v1->v2: > - Change the style of the ULPPLL check function (more > compact) > - Fix a missing of_node_put() by actually returning > with -ENODEV on error. > > ARM SoC folks: as this mostly affects the MFD subsystems > I think it'd be best if Lee can merge it, I do not > plan any other changes to the ARM core files that the > patch touches. > --- > arch/arm/mach-ux500/cpu-db8500.c | 2 +- > drivers/mfd/db8500-prcmu.c | 63 ++++++++++++++++++++++---------- > include/linux/mfd/db8500-prcmu.h | 4 +- > include/linux/mfd/dbx500-prcmu.h | 7 ++-- > 4 files changed, 50 insertions(+), 26 deletions(-) Applied, thanks. -- Lee Jones [李琼斯] Linaro Services Technical Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog