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Date:   Mon, 11 Nov 2019 21:56:17 -0800 (PST)
Message-Id: <20191111.215617.1625420574702786179.davem@redhat.com>
To:     Mark-MC.Lee@mediatek.com
Cc:     sean.wang@mediatek.com, john@phrozen.org, matthias.bgg@gmail.com,
        andrew@lunn.ch, robh+dt@kernel.org, mark.rutland@arm.com,
        opensource@vdorst.com, devicetree@vger.kernel.org,
        netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
        jakub.kicinski@netronome.com
Subject: Re: [PATCH net,v2 1/3] net: ethernet: mediatek: Integrate GDM/PSE
 setup operations
From:   David Miller <davem@redhat.com>
In-Reply-To: <20191111065129.30078-2-Mark-MC.Lee@mediatek.com>
References: <20191111065129.30078-1-Mark-MC.Lee@mediatek.com>
        <20191111065129.30078-2-Mark-MC.Lee@mediatek.com>
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From: MarkLee <Mark-MC.Lee@mediatek.com>
Date: Mon, 11 Nov 2019 14:51:27 +0800

> +static void mtk_gdm_config(struct mtk_eth *eth, u32 config)
> +{
> +=09int i;
> +
> +=09for (i =3D 0; i < MTK_MAC_COUNT; i++) {
> +=09=09u32 val =3D mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
> +
> +=09=09/* default setup the forward port to send frame to PDMA */
> +=09=09val &=3D ~0xffff;
> +
> +=09=09/* Enable RX checksum */
> +=09=09val |=3D MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
> +
> +=09=09val |=3D config;
> +
> +=09=09mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
> +=09}
> +=09/*Reset and enable PSE*/

Please put spaces before and after the comment sentence, like:

=09/* Reset and enable PSE */