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From:   <Eugen.Hristev@microchip.com>
To:     <robh+dt@kernel.org>, <Nicolas.Ferre@microchip.com>,
        <alexandre.belloni@bootlin.com>, <Ludovic.Desroches@microchip.com>
CC:     <devicetree@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>, <andrei.stefanescu@microchip.com>
Subject: [PATCH 2/4] ARM: dts: at91: sama5d2: mark secumod as a GPIO
 controller
Thread-Topic: [PATCH 2/4] ARM: dts: at91: sama5d2: mark secumod as a GPIO
 controller
Thread-Index: AQHVmSmTH5PbKLYeTkCVnPR/+Dbj2w==
Date:   Tue, 12 Nov 2019 07:19:51 +0000
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From: Andrei Stefanescu <andrei.stefanescu@microchip.com>

The Security Module exposes the PIOBU pins which an be used
as regular GPIOs. The PIOBU pins are special because they do
not lose their voltage during suspend-to-mem.

This patch marks the secumod as a GPIO controller.

Signed-off-by: Andrei Stefanescu <andrei.stefanescu@microchip.com>
[razvan.stefanescu@microchip.com Updated title]
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@microchip.com>
---
 arch/arm/boot/dts/sama5d2.dtsi | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dts=
i
index 4d3ba6d..1b6f44b 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -885,9 +885,12 @@
 				clocks =3D <&pmc PMC_TYPE_PERIPHERAL 18>;
 			};
=20
-			secumod@fc040000 {
+			pioBU: secumod@fc040000 {
 				compatible =3D "atmel,sama5d2-secumod", "syscon";
 				reg =3D <0xfc040000 0x100>;
+
+				gpio-controller;
+				#gpio-cells =3D <2>;
 			};
=20
 			tdes@fc044000 {
--=20
2.7.4