Date: Fri, 13 Jan 2006 22:02:15 +0000
From: Russell King <rmk+lkml@arm.linux.org.uk>
To: Tejun Heo <htejun@gmail.com>
Cc: axboe@suse.de, bzolnier@gmail.com, james.steward@dynamicratings.com,
       jgarzik@pobox.com, James.Bottomley@SteelEye.com,
       linux-kernel@vger.kernel.org
Subject: Re: [PATCHSET] block: fix PIO cache coherency bug
Message-ID: <20060113220215.GD31824@flint.arm.linux.org.uk>
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	bzolnier@gmail.com, james.steward@dynamicratings.com,
	jgarzik@pobox.com, James.Bottomley@SteelEye.com,
	linux-kernel@vger.kernel.org
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On Sat, Jan 14, 2006 at 12:24:16AM +0900, Tejun Heo wrote:
> Russell, can you please test whether this fixes the bug on arm?  If
> this fixes the bug and people agree with the approach, I'll follow up
> with patches for yet unconverted drivers and documentation update.

Unfortunately, as I previously explained, I'm not able to test this.
The reason is that in order to reproduce the bug, you need a system
with a VIVT write-back write-allocate cache.

Unfortunately, the few systems I have which have such a cache do not
have IDE, SCSI nor SATA (not even PCMCIA.)  I suggest contacting the
folk who reported the bug in the first instance.

-- 
Russell King
 Linux kernel    2.6 ARM Linux   - http://www.arm.linux.org.uk/
 maintainer of:  2.6 Serial core
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