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From:   Bharat Kumar Gogada <bharatku@xilinx.com>
To:     Matthew Wilcox <willy@infradead.org>,
        Dan Williams <dan.j.williams@intel.com>
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        "linux-fsdevel@vger.kernel.org" <linux-fsdevel@vger.kernel.org>,
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        "viro@zeniv.linux.org.uk" <viro@zeniv.linux.org.uk>,
        "jack@suse.cz" <jack@suse.cz>
Subject: RE: DAX filesystem support on ARMv8
Thread-Topic: DAX filesystem support on ARMv8
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Date:   Thu, 14 Nov 2019 06:54:43 +0000
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>=20
> On Tue, Nov 12, 2019 at 09:15:18AM -0800, Dan Williams wrote:
> > On Mon, Nov 11, 2019 at 6:12 PM Bharat Kumar Gogada
> <bharatku@xilinx.com> wrote:
> > >
> > > Hi All,
> > >
> > > As per Documentation/filesystems/dax.txt
> > >
> > > The DAX code does not work correctly on architectures which have
> > > virtually mapped caches such as ARM, MIPS and SPARC.
> > >
> > > Can anyone please shed light on dax filesystem issue w.r.t ARM archit=
ecture
> ?
> >
> > The concern is VIVT caches since the kernel will want to flush pmem
> > addresses with different virtual addresses than what userspace is
> > using. As far as I know, ARMv8 has VIPT caches, so should not have an
> > issue. Willy initially wrote those restrictions, but I am assuming
> > that the concern was managing the caches in the presence of virtual
> > aliases.
>=20
> The kernel will also access data at different virtual addresses from user=
space.
> So VIVT CPUs will be mmap/read/write incoherent, as well as being flush
> incoherent.

Thanks a lot Wilcox and Dan for clarification.=20
So the above restriction only applies to ARM architectures with VIVT caches=
 and not=20
for VIPT caches.=20


Regards,
Bharat=20