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Thu, 14 Nov 2019 08:37:25 +0000 From: "james qian wang (Arm Technology China)" To: Liviu Dudau , "airlied@linux.ie" , Brian Starkey , "maarten.lankhorst@linux.intel.com" , "sean@poorly.run" , Mihail Atanassov CC: "Jonathan Chai (Arm Technology China)" , "Julien Yin (Arm Technology China)" , "Thomas Sun (Arm Technology China)" , "Lowry Li (Arm Technology China)" , Ayan Halder , "Tiannan Zhu (Arm Technology China)" , "Yiqi Kang (Arm Technology China)" , nd , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , Ben Davis , "Oscar Zhang (Arm Technology China)" , "Channing Chen (Arm Technology China)" , "james qian wang (Arm Technology China)" Subject: [PATCH v3 1/6] drm/komeda: Add side by side assembling Thread-Topic: [PATCH v3 1/6] drm/komeda: Add side by side assembling Thread-Index: AQHVmsa9UkYGk9o7O0O+920wharNZA== Date: Thu, 14 Nov 2019 08:37:24 +0000 Message-ID: <20191114083658.27237-2-james.qian.wang@arm.com> References: <20191114083658.27237-1-james.qian.wang@arm.com> In-Reply-To: <20191114083658.27237-1-james.qian.wang@arm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [113.29.88.7] x-clientproxiedby: HK0PR01CA0038.apcprd01.prod.exchangelabs.com (2603:1096:203:3e::26) To VE1PR08MB5006.eurprd08.prod.outlook.com (2603:10a6:803:113::31) Authentication-Results-Original: spf=none (sender IP is ) smtp.mailfrom=james.qian.wang@arm.com; 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X-MS-Office365-Filtering-Correlation-Id-Prvs: db6ed058-2e0e-4029-4a3a-08d768dddfbc NoDisclaimer: True X-Forefront-PRVS: 02213C82F8 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: V3ybpb8iIWiTbbSCaNF1yQYko1HzPPrbyVoeOpph4Wj9OY7Jcfn4HUG9AsWRpvba93V5ZsPpiSmkYXMTuRZbyoA9nBvQzW0r7tFz2ryUpz8yDoQig6fI0eFwk5VlFixmtMaXGZEKIaabBlKGF2g4XC4H//KPy+12bZxBlGmFKOxixI3zKNkukkKDi9edjI97Vh2S871Cyymq3VDBy+37aUqJXyFXan5aPPB5sUpvCmVPTS16CiXs2fycpd6S3usxyRauuzM5JIwBPT99rs0SgCZ9DthjEnZn3vX6Ob0t4tG6dp0WrjpcMKMy4g3e18dQeTNUBfE6Hc8gKCCfN7tYgCOOwycomKGfE3Xvkk3r6cL+fYzY5ks0f0jg8zNKgW82TL9B8+aKo+fbCUiA6uywzXGFoWD/uLODw+1t0Clp1vGuNkKjDiUme5l/MIzq+sx5 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Nov 2019 08:37:34.8628 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 628033a1-f98c-4605-7cd1-08d768dde5d5 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM5PR0802MB2564 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Komeda HW can support side by side, which splits the internal display processing to two single halves (LEFT/RIGHT) and handle them by two pipelines separately. komeda "side by side" is enabled by DT property: "side_by_side_master", once DT configured side by side, komeda need to verify it with HW's configuration, and assemble it for the further usage. v3: Correct a typo. Signed-off-by: James Qian Wang (Arm Technology China) --- .../gpu/drm/arm/display/komeda/komeda_crtc.c | 13 ++++- .../gpu/drm/arm/display/komeda/komeda_dev.c | 3 ++ .../gpu/drm/arm/display/komeda/komeda_dev.h | 9 ++++ .../gpu/drm/arm/display/komeda/komeda_kms.h | 3 ++ .../drm/arm/display/komeda/komeda_pipeline.c | 50 +++++++++++++++++-- .../drm/arm/display/komeda/komeda_pipeline.h | 1 + 6 files changed, 73 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers/gpu= /drm/arm/display/komeda/komeda_crtc.c index 1c452ea75999..cee9a1692e71 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c @@ -561,21 +561,30 @@ int komeda_kms_setup_crtcs(struct komeda_kms_dev *kms= , kms->n_crtcs =3D 0; =20 for (i =3D 0; i < mdev->n_pipelines; i++) { + /* if sbs, one komeda_dev only can represent one CRTC */ + if (mdev->side_by_side && i !=3D mdev->side_by_side_master) + continue; + crtc =3D &kms->crtcs[kms->n_crtcs]; master =3D mdev->pipelines[i]; =20 crtc->master =3D master; crtc->slave =3D komeda_pipeline_get_slave(master); + crtc->side_by_side =3D mdev->side_by_side; =20 if (crtc->slave) sprintf(str, "pipe-%d", crtc->slave->id); else sprintf(str, "None"); =20 - DRM_INFO("CRTC-%d: master(pipe-%d) slave(%s).\n", - kms->n_crtcs, master->id, str); + DRM_INFO("CRTC-%d: master(pipe-%d) slave(%s) sbs(%s).\n", + kms->n_crtcs, master->id, str, + crtc->side_by_side ? "On" : "Off"); =20 kms->n_crtcs++; + + if (mdev->side_by_side) + break; } =20 return 0; diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c b/drivers/gpu/= drm/arm/display/komeda/komeda_dev.c index 4e46f650fddf..c3fa4835cb8d 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c @@ -178,6 +178,9 @@ static int komeda_parse_dt(struct device *dev, struct k= omeda_dev *mdev) } } =20 + mdev->side_by_side =3D !of_property_read_u32(np, "side_by_side_master", + &mdev->side_by_side_master); + return ret; } =20 diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.h b/drivers/gpu/= drm/arm/display/komeda/komeda_dev.h index d406a4d83352..471604b42431 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.h +++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.h @@ -183,6 +183,15 @@ struct komeda_dev { =20 /** @irq: irq number */ int irq; + /** + * @side_by_side: + * + * on sbs the whole display frame will be split to two halves (1:2), + * master pipeline handles the left part, slave for the right part + */ + bool side_by_side; + /** @side_by_side_master: master pipe id for side by side */ + int side_by_side_master; =20 /** @lock: used to protect dpmode */ struct mutex lock; diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h b/drivers/gpu/= drm/arm/display/komeda/komeda_kms.h index 456f3c435719..ae6654fe95e2 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h +++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.h @@ -76,6 +76,9 @@ struct komeda_crtc { */ struct komeda_pipeline *slave; =20 + /** @side_by_side: if the master and slave works on side by side mode */ + bool side_by_side; + /** @slave_planes: komeda slave planes mask */ u32 slave_planes; =20 diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c b/drivers= /gpu/drm/arm/display/komeda/komeda_pipeline.c index 452e505a1fd3..104e27cc1dc3 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c @@ -326,14 +326,56 @@ static void komeda_pipeline_assemble(struct komeda_pi= peline *pipe) struct komeda_pipeline * komeda_pipeline_get_slave(struct komeda_pipeline *master) { - struct komeda_component *slave; + struct komeda_dev *mdev =3D master->mdev; + struct komeda_component *comp, *slave; + u32 avail_inputs; + + /* on SBS, slave pipeline merge to master via image processor */ + if (mdev->side_by_side) { + comp =3D &master->improc->base; + avail_inputs =3D KOMEDA_PIPELINE_IMPROCS; + } else { + comp =3D &master->compiz->base; + avail_inputs =3D KOMEDA_PIPELINE_COMPIZS; + } =20 - slave =3D komeda_component_pickup_input(&master->compiz->base, - KOMEDA_PIPELINE_COMPIZS); + slave =3D komeda_component_pickup_input(comp, avail_inputs); =20 return slave ? slave->pipeline : NULL; } =20 +static int komeda_assemble_side_by_side(struct komeda_dev *mdev) +{ + struct komeda_pipeline *master, *slave; + int i; + + if (!mdev->side_by_side) + return 0; + + if (mdev->side_by_side_master >=3D mdev->n_pipelines) { + DRM_ERROR("DT configured side by side master-%d is invalid.\n", + mdev->side_by_side_master); + return -EINVAL; + } + + master =3D mdev->pipelines[mdev->side_by_side_master]; + slave =3D komeda_pipeline_get_slave(master); + if (!slave || slave->n_layers !=3D master->n_layers) { + DRM_ERROR("Current HW doesn't support side by side.\n"); + return -EINVAL; + } + + if (!master->dual_link) { + DRM_DEBUG_ATOMIC("SBS can not work without dual link.\n"); + return -EINVAL; + } + + for (i =3D 0; i < master->n_layers; i++) + master->layers[i]->sbs_slave =3D slave->layers[i]; + + return 0; +} + int komeda_assemble_pipelines(struct komeda_dev *mdev) { struct komeda_pipeline *pipe; @@ -346,7 +388,7 @@ int komeda_assemble_pipelines(struct komeda_dev *mdev) komeda_pipeline_dump(pipe); } =20 - return 0; + return komeda_assemble_side_by_side(mdev); } =20 void komeda_pipeline_dump_register(struct komeda_pipeline *pipe, diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h b/drivers= /gpu/drm/arm/display/komeda/komeda_pipeline.h index ac8725e24853..20a076cce635 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h +++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h @@ -237,6 +237,7 @@ struct komeda_layer { * not the source buffer. */ struct komeda_layer *right; + struct komeda_layer *sbs_slave; }; =20 struct komeda_layer_state { --=20 2.20.1