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[209.132.180.67]) by mx.google.com with ESMTP id x28si10985742edl.21.2019.11.16.07.38.56; Sat, 16 Nov 2019 07:39:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ozWXkWyG; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727818AbfKPPgH (ORCPT + 99 others); Sat, 16 Nov 2019 10:36:07 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:43522 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727737AbfKPPgH (ORCPT ); Sat, 16 Nov 2019 10:36:07 -0500 Received: by mail-wr1-f65.google.com with SMTP id n1so14167660wra.10 for ; Sat, 16 Nov 2019 07:36:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=KbnEz2iLp0S1UHHj6E2CggW0R84FXQGiB2UBE1fi4DM=; b=ozWXkWyG3A5cGq+w9YTKCVqzCTjQ8/pABQLRwTEnuJfl/Tp871sIjQmSrxnJGEh08Y YrRkxaBl5mLQmDGsDD+Z4bLJNvXWRzz4y+T/NmM6Ys+XlyCgjCwoG5ZuK55SzHUaITA4 blWvky3lGUjj0bogjQfjkjd+Lwpm0nC75cIgsf3JUvR/CaWS0aIl9Icbi5uy+NrhJi3h +xXQ1dQs/EEJYNRm0wBFJ/HcFq6OpaP2w+OKLOeXWdQpIlg9I+DzElRS5whsbHO4p1Se AZdBF7jdJ7sbB/w/VA4PIZeIxwYy/jm37DHbEwlOLgdD1OB3262csK72wAYffMvZBY0a mQVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=KbnEz2iLp0S1UHHj6E2CggW0R84FXQGiB2UBE1fi4DM=; b=WI2/qTEk94+3vgW9yb8wWP6shsDrEcissOJ8M0Kx/kD5Mc4u4WUSmBxFVle82akYsv OG17RvHS2AH5eQceSagfkK9nHWapBAwRZVuW3NGbAfihdIifSBRanKJgDalvbGV53YdR l+5i9y7L0wjCpZlfLqfYZK5om1wJ6OfvODT+INTG/sHwpEhDbSx94odC098ZLkvJLTno oIAk+woIZsbNw42S47uxcK4cAWgEZl3poLWAkSQQnmkTayD1XttW+X+X48S/dxnsWlf4 RoVfm6iX+g3WJGXUSNw1asXR0ZlaxfF2NkbDEAlniyxp49lcnT/qK/LFbkQuV6zDgiic ruaw== X-Gm-Message-State: APjAAAXg6VR7jNELUsW4mT1G1THFre6GV5s0XVwVGYK9biwNu9KL6XYD tsawE99aLINreoy6S8XQdgRc7vakd71iD8kC+/6ySQ== X-Received: by 2002:adf:b1cb:: with SMTP id r11mr12115894wra.246.1573918565380; Sat, 16 Nov 2019 07:36:05 -0800 (PST) MIME-Version: 1.0 References: <5dcf8f19.1c69fb81.c02f3.91f2@mx.google.com> <20191116104932.GT25745@shell.armlinux.org.uk> In-Reply-To: <20191116104932.GT25745@shell.armlinux.org.uk> From: Ard Biesheuvel Date: Sat, 16 Nov 2019 16:35:53 +0100 Message-ID: Subject: Re: rmk/for-next bisection: boot on ox820-cloudengines-pogoplug-series-3 To: Russell King - ARM Linux admin Cc: "kernelci.org bot" , Arnd Bergmann , Ard Biesheuvel , tomeu.vizoso@collabora.com, Guillaume Tucker , mgalka@collabora.com, Mark Brown , Matt Hart , Kevin Hilman , Enric Balletbo i Serra , Marc Zyngier , Linus Walleij , Linux Kernel Mailing List , Thomas Gleixner , Stefan Agner , Nicolas Pitre , Nick Desaulniers , linux-arm-kernel Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, 16 Nov 2019 at 11:49, Russell King - ARM Linux admin wrote: > > On Sat, Nov 16, 2019 at 10:26:27AM +0000, Ard Biesheuvel wrote: > > (+ Arnd) > > > > On Sat, 16 Nov 2019 at 05:54, kernelci.org bot wrote: > > > > > > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * > > > * This automated bisection report was sent to you on the basis * > > > * that you may be involved with the breaking commit it has * > > > * found. No manual investigation has been done to verify it, * > > > * and the root cause of the problem may be somewhere else. * > > > * * > > > * If you do send a fix, please include this trailer: * > > > * Reported-by: "kernelci.org bot" * > > > * * > > > * Hope this helps! * > > > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * > > > > > > rmk/for-next bisection: boot on ox820-cloudengines-pogoplug-series-3 > > > > > > Summary: > > > Start: b6c3c42cfda0 ARM: 8938/1: kernel: initialize broadcast hrtimer based clock event device > > > Details: https://kernelci.org/boot/id/5dcf3f0359b514dc84cf54c8 > > > Plain log: https://storage.kernelci.org//rmk/for-next/v5.4-rc5-26-gb6c3c42cfda0/arm/oxnas_v6_defconfig/gcc-8/lab-baylibre/boot-ox820-cloudengines-pogoplug-series-3.txt > > > HTML log: https://storage.kernelci.org//rmk/for-next/v5.4-rc5-26-gb6c3c42cfda0/arm/oxnas_v6_defconfig/gcc-8/lab-baylibre/boot-ox820-cloudengines-pogoplug-series-3.html > > > Result: ea70bf6e92c5 ARM: 8935/1: decompressor: avoid CP15 barrier instructions in v7 cache setup code > > > > > > > OK, so this regression is caused by the fact that the 'armv7' cache > > maintenance routines in the decompressor are also used for ARMv6 cores > > if they implement the CPUID extension, which I failed to realise when > > I sent this patch. > > > > There are roughly three ways to deal with this: > > 1) add a mask/val match pair for ARM11MPcore and ARM1176 that hardwire > > them to the ARMv6 routines, even though they implement the CPUID > > extension. This would be very easy, but assumes that those two cores > > are the only ones that are affected by this. > > 2) modify the v7 routines to check for the L1Hvd MMFR1 attribute (in > > the flush routine) and for the CP15BEN SCTLR bit (in the on/off > > routines), and jump to the respective v6 variants if the CPU turns out > > not to support the v7 one. > > 3) revert the patch, and just enable the CP15 barriers (and issue a v7 > > barrier) in the v7 on() and flush() routines. > > > > I am leaning towards the latter, since it is the most straightforward, > > even though it mixes v7 and cp15 barriers in the same function, but > > that was mostly a cosmetic concern anyway. > > I'm going to drop the patches - if -rc8 is released tomorrow maybe we > can have a go at solving it next week. > Fair enough.