Subject: Re: [Lse-tech] Re: RFC: patch to allow lock-free traversal of lists
To: torvalds@transmeta.com (Linus Torvalds)
Date: Sat, 13 Oct 2001 14:54:25 +0100 (BST)
Cc: paulus@samba.org (Paul Mackerras), linux-kernel@vger.kernel.org
In-Reply-To: <Pine.LNX.4.33.0110121846030.8148-100000@penguin.transmeta.com> from "Linus Torvalds" at Oct 12, 2001 07:00:41 PM
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Message-Id: <E15sPFB-0002jT-00@the-village.bc.nu>
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
Sender: linux-kernel-owner@vger.kernel.org

> It is discussed in the multi-procesor management section, under "memory
> ordering", and it does say that "reads can be carried out specilatively
> and in any order".
> 
> HOWEVER, it does have what Intel calles "processor order", and it claims
> that "writes by a single processor are observed in the same order by all
> processors."

The other thing on the intel side is that you have to read the errata
documentation. There are an interesting collection of misordering errata.

> (But Intel has redefined the memory ordering so many times that they might
> redefine it in the future too and say that dependent loads are ok. I
> suspect most of the definitions are of the type "Oh, it used to be ok in
> the implementation even though it wasn't defined, and it turns out that
> Windows doesn't work if we change it, so we'll define darkness to be the
> new standard"..)

Its notable that the folks who did looser ordering x86 clones had MTRRs
to enable the performance boost

Alan
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