Received: by 2002:a25:7ec1:0:0:0:0:0 with SMTP id z184csp3231777ybc; Mon, 18 Nov 2019 11:42:36 -0800 (PST) X-Google-Smtp-Source: APXvYqz3DZs7liAPHI9r5i6G7umCgEGoQni30xVtEzd5IzfoM3VdrK6UrIQmqHeW154hGfCLybJE X-Received: by 2002:a17:906:3ec2:: with SMTP id d2mr29557572ejj.251.1574106156509; Mon, 18 Nov 2019 11:42:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574106156; cv=none; d=google.com; s=arc-20160816; b=RgUiOxHXm+ovRSQDMdR1yu24/olft6Q2oB+0rm8k6R6NNq8mRHgl4UOQe9kbuwBjgb oWwel0ASyvy0WK54WVsbth4YpZVQs9GSsYGnjaHCjaJIw40iOcAIV0JgWF9M3wRicMaj jZZVvuJRaovTZ+YSagULXK10BSEpmYDWAiRJelVFqD84sZnA7gDDsxjDiHqq7l5Z9LG5 bQzEy4RHDxqVKbXrTODSRhbDhI77C6yaoC+3T08DzMRTHFyAKQqW5OWyt/Y8l9Ep1fXU ZgiXlsMKJgcJoT9Ng6J+Db2HZkdWkUszAf6VJWg6ljWVyQBMfLcpMYeGMQXu08Newhy5 xdsA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=6iyZU5JVqSKo5WyjbvnY/VPiQ3J7jreEaF+qmlvghlo=; b=gigzLfd/594zcJh04/csSkr3ot/RwRqZoT1b2KpbEb9JXdtTetgIhp7KSV+kUudnuS nMwyY6p4iz0TccWmHezZBWJxvuefiEJyePybACpeUGcMH9/uYTsWkSVJiZrEY3FVHn8/ kFQKJysPMb2jtCnewMURSfDQc40/wcvO7Dl4b+7qT72QhTW1NM13DbXFKijleJ4F087t 65V6YJZgIxOc/cVDcTSbXaU6KdLq1pDw22TuJ/VB2hdxmPv8u5o11LQ0E1myvqoCanfi VdcdvKfwteXCPhq7ODVWComJC0VW0jKJUk26L2SfmqUL4wEDbTq7IsD33/rnKlfzkB+C AU8Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f19si12813410eda.435.2019.11.18.11.42.13; Mon, 18 Nov 2019 11:42:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726809AbfKRTiA (ORCPT + 99 others); Mon, 18 Nov 2019 14:38:00 -0500 Received: from mga02.intel.com ([134.134.136.20]:60271 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726767AbfKRTiA (ORCPT ); Mon, 18 Nov 2019 14:38:00 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 18 Nov 2019 11:37:59 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,321,1569308400"; d="scan'208";a="380760849" Received: from jacob-builder.jf.intel.com ([10.7.199.155]) by orsmga005.jf.intel.com with ESMTP; 18 Nov 2019 11:37:59 -0800 From: Jacob Pan To: iommu@lists.linux-foundation.org, LKML , Joerg Roedel , "Lu Baolu" , David Woodhouse Cc: "Tian, Kevin" , Raj Ashok , "Yi Liu" , Eric Auger , Jacob Pan Subject: [PATCH v2 02/10] iommu/vt-d: Fix CPU and IOMMU SVM feature matching checks Date: Mon, 18 Nov 2019 11:42:25 -0800 Message-Id: <1574106153-45867-3-git-send-email-jacob.jun.pan@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1574106153-45867-1-git-send-email-jacob.jun.pan@linux.intel.com> References: <1574106153-45867-1-git-send-email-jacob.jun.pan@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The current code checks CPU and IOMMU feature set for SVM support but the result is never stored nor used. Therefore, SVM can still be used even when these checks failed. This patch consolidates code for checking PASID, CPU vs. IOMMU paging mode compatibility, as well as provides specific error messages for each failed checks. Signed-off-by: Jacob Pan Acked-by: Lu Baolu --- drivers/iommu/intel-iommu.c | 10 ++-------- drivers/iommu/intel-svm.c | 40 +++++++++++++++++++++++++++------------- include/linux/intel-iommu.h | 4 +++- 3 files changed, 32 insertions(+), 22 deletions(-) diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index 3f974919d3bd..d598168e410d 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -3289,10 +3289,7 @@ static int __init init_dmars(void) if (!ecap_pass_through(iommu->ecap)) hw_pass_through = 0; -#ifdef CONFIG_INTEL_IOMMU_SVM - if (pasid_supported(iommu)) - intel_svm_init(iommu); -#endif + intel_svm_check(iommu); } /* @@ -4471,10 +4468,7 @@ static int intel_iommu_add(struct dmar_drhd_unit *dmaru) if (ret) goto out; -#ifdef CONFIG_INTEL_IOMMU_SVM - if (pasid_supported(iommu)) - intel_svm_init(iommu); -#endif + intel_svm_check(iommu); if (dmaru->ignored) { /* diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c index 9b159132405d..716c543488f6 100644 --- a/drivers/iommu/intel-svm.c +++ b/drivers/iommu/intel-svm.c @@ -23,19 +23,6 @@ static irqreturn_t prq_event_thread(int irq, void *d); -int intel_svm_init(struct intel_iommu *iommu) -{ - if (cpu_feature_enabled(X86_FEATURE_GBPAGES) && - !cap_fl1gp_support(iommu->cap)) - return -EINVAL; - - if (cpu_feature_enabled(X86_FEATURE_LA57) && - !cap_5lp_support(iommu->cap)) - return -EINVAL; - - return 0; -} - #define PRQ_ORDER 0 int intel_svm_enable_prq(struct intel_iommu *iommu) @@ -99,6 +86,33 @@ int intel_svm_finish_prq(struct intel_iommu *iommu) return 0; } +static inline bool intel_svm_capable(struct intel_iommu *iommu) +{ + return iommu->flags & VTD_FLAG_SVM_CAPABLE; +} + +void intel_svm_check(struct intel_iommu *iommu) +{ + if (!pasid_supported(iommu)) + return; + + if (cpu_feature_enabled(X86_FEATURE_GBPAGES) && + !cap_fl1gp_support(iommu->cap)) { + pr_err("%s SVM disabled, incompatible 1GB page capability\n", + iommu->name); + return; + } + + if (cpu_feature_enabled(X86_FEATURE_LA57) && + !cap_5lp_support(iommu->cap)) { + pr_err("%s SVM disabled, incompatible paging mode\n", + iommu->name); + return; + } + + iommu->flags |= VTD_FLAG_SVM_CAPABLE; +} + static void intel_flush_svm_range_dev (struct intel_svm *svm, struct intel_svm_dev *sdev, unsigned long address, unsigned long pages, int ih) { diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index 63118991824c..7dcfa1c4a844 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -657,7 +657,7 @@ void iommu_flush_write_buffer(struct intel_iommu *iommu); int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct device *dev); #ifdef CONFIG_INTEL_IOMMU_SVM -int intel_svm_init(struct intel_iommu *iommu); +extern void intel_svm_check(struct intel_iommu *iommu); extern int intel_svm_enable_prq(struct intel_iommu *iommu); extern int intel_svm_finish_prq(struct intel_iommu *iommu); @@ -685,6 +685,8 @@ struct intel_svm { }; extern struct intel_iommu *intel_svm_device_to_iommu(struct device *dev); +#else +static inline void intel_svm_check(struct intel_iommu *iommu) {} #endif #ifdef CONFIG_INTEL_IOMMU_DEBUGFS -- 2.7.4