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Tue, 19 Nov 2019 09:22:07 +0000 From: "james qian wang (Arm Technology China)" To: Mihail Atanassov CC: nd , Liviu Dudau , "airlied@linux.ie" , Brian Starkey , "maarten.lankhorst@linux.intel.com" , "sean@poorly.run" , "Jonathan Chai (Arm Technology China)" , "Julien Yin (Arm Technology China)" , "Thomas Sun (Arm Technology China)" , "Lowry Li (Arm Technology China)" , Ayan Halder , "Tiannan Zhu (Arm Technology China)" , "Yiqi Kang (Arm Technology China)" , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , Ben Davis , "Oscar Zhang (Arm Technology China)" , "Channing Chen (Arm Technology China)" Subject: Re: [PATCH v3 1/6] drm/komeda: Add side by side assembling Thread-Topic: [PATCH v3 1/6] drm/komeda: Add side by side assembling Thread-Index: AQHVmsa9UkYGk9o7O0O+920wharNZKeLWkAAgAbly4A= Date: Tue, 19 Nov 2019 09:22:07 +0000 Message-ID: <20191119092201.GC2881@jamwan02-TSP300> References: <20191114083658.27237-1-james.qian.wang@arm.com> <20191114083658.27237-2-james.qian.wang@arm.com> <6478126.Gfiuz5foDL@e123338-lin> In-Reply-To: <6478126.Gfiuz5foDL@e123338-lin> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: user-agent: Mutt/1.10.1 (2018-07-13) x-originating-ip: [113.29.88.7] x-clientproxiedby: HK0P153CA0040.APCP153.PROD.OUTLOOK.COM (2603:1096:203:17::28) To VE1PR08MB5006.eurprd08.prod.outlook.com (2603:10a6:803:113::31) Authentication-Results-Original: spf=none (sender IP is ) smtp.mailfrom=james.qian.wang@arm.com; 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X-MS-Office365-Filtering-Correlation-Id-Prvs: a338e57e-5a17-4375-2ebc-08d76cd1f2a9 NoDisclaimer: True X-Forefront-PRVS: 022649CC2C X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 9dmZ7GDqYjTkexfZhPZE0WucJhjib/OOiyg96dH+pB3TApG70xgG9GM6QB4dO3dvqo08yG5jVwn5wuKBuHv2s4XVvcL4DVVd0QHhJexcpjDdSEqWxCMwT7CZn98BkdrfQQoEUqlrjWLGEg8FCnlLofAJjWNgLnbMqrHg7B8+CGazsCCz2LSUwnmLAUCH+ZH3fQdVc3a6K3jgBXKrXxIi2m8wIrbo4ECBg0Yqt7wkISkOVwTkVaz7F+P4fUPW3Uj+MRde6cLkUbhHG0brPHgn6LiXd8f96Mlb70QkpMo3mE+A6adkrL+KItILcSSVlU+1MDpbS8hgfHVTHffRLwB0XywBykGHDzTmpK9RMn5vIHpqYH8eb7p7LfNNIpVplLgQml68K8B3kroJXwGNbEeKotmlBXyL3ZkVBxS90PtQcs/3H+uIVFk8TwaXBhM6noaF X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Nov 2019 09:22:20.2698 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3e37c4dc-b97f-4d93-6c22-08d76cd1fa92 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB6PR0801MB1751 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Nov 15, 2019 at 12:02:00AM +0000, Mihail Atanassov wrote: > Hi James, >=20 > On Thursday, 14 November 2019 08:37:24 GMT james qian wang (Arm Technolog= y China) wrote: > > Komeda HW can support side by side, which splits the internal display > > processing to two single halves (LEFT/RIGHT) and handle them by two > > pipelines separately. > > komeda "side by side" is enabled by DT property: "side_by_side_master", > > once DT configured side by side, komeda need to verify it with HW's > > configuration, and assemble it for the further usage. >=20 > A few problems I see with this approach: > - This property doesn't scale to >2 pipes; > - Our HW is capable of dynamically switching between SBS and non-SBS > modes, with this DT property you're effectively denying the opportunity > to use the second pipe when the first one can be satisfied with > 4 planes and 1px/clk. >=20 > If we only want to fix the first problem, then at least we need this > to be a property of the pipeline node with a phandle linking slave to > master (or bidirectional). I had consider this way before, but consider we have no product (now and in next 2/3 years) can support >2 pipes. So for DT I decide to focus on current, but you may see I add two side_by_side flags. - mdev->side_by_side. - crtc->side_by_side. And beside the DT parse we use mdev->side_by_side, the real SBS operation actually based on crtc->side_by_side, then once the HW changed, we only need to update the SBS assemble/decision code, but no need to update the real sbs logic. thanks James > For the second, why not do the SBS decision at modeset time? > If the first CRTC has dual-link output and the commit: > - only drives one CRTC > - uses up to 4 planes > - doesn't meet clk requirements without SBS but does with SBS > then we can switch SBS on dynamically. > And we can tweak that decision with power use in mind later on since > there's no user-visible knob. Yes, you're right, current implementation just use simplest way to show the feature, and for dynamic enable/disable sbs will be added when we have the real usage case. > We can still keep a DT property if we have a use case for it (e.g. > forcing SBS on for some reason), but we might want to name it slightly > more conservatively then, so it doesn't imply that we never do SBS > when it's not there. >=20 > Lastly, maintaining that property in combination with the dynamic > modeset-time SBS decision tree means extra code for more or less the > same functionality. <2c>I'm not 100% sure it's worth it. I think we'd add such support when we have the real use case. :) > >=20 > > v3: Correct a typo. > >=20 > > Signed-off-by: James Qian Wang (Arm Technology China) > > --- > > .../gpu/drm/arm/display/komeda/komeda_crtc.c | 13 ++++- > > .../gpu/drm/arm/display/komeda/komeda_dev.c | 3 ++ > > .../gpu/drm/arm/display/komeda/komeda_dev.h | 9 ++++ > > .../gpu/drm/arm/display/komeda/komeda_kms.h | 3 ++ > > .../drm/arm/display/komeda/komeda_pipeline.c | 50 +++++++++++++++++-- > > .../drm/arm/display/komeda/komeda_pipeline.h | 1 + > > 6 files changed, 73 insertions(+), 6 deletions(-) > >=20 > > diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers= /gpu/drm/arm/display/komeda/komeda_crtc.c > > index 1c452ea75999..cee9a1692e71 100644 > > --- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c > > +++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c > > @@ -561,21 +561,30 @@ int komeda_kms_setup_crtcs(struct komeda_kms_dev = *kms, > > kms->n_crtcs =3D 0; > > =20 > > for (i =3D 0; i < mdev->n_pipelines; i++) { > > + /* if sbs, one komeda_dev only can represent one CRTC */ > > + if (mdev->side_by_side && i !=3D mdev->side_by_side_master) > > + continue; > > + > > crtc =3D &kms->crtcs[kms->n_crtcs]; > > master =3D mdev->pipelines[i]; > > =20 > > crtc->master =3D master; > > crtc->slave =3D komeda_pipeline_get_slave(master); > > + crtc->side_by_side =3D mdev->side_by_side; > > =20 > > if (crtc->slave) > > sprintf(str, "pipe-%d", crtc->slave->id); > > else > > sprintf(str, "None"); > > =20 > > - DRM_INFO("CRTC-%d: master(pipe-%d) slave(%s).\n", > > - kms->n_crtcs, master->id, str); > > + DRM_INFO("CRTC-%d: master(pipe-%d) slave(%s) sbs(%s).\n", > > + kms->n_crtcs, master->id, str, > > + crtc->side_by_side ? "On" : "Off"); > > =20 > > kms->n_crtcs++; > > + > > + if (mdev->side_by_side) > > + break; > > } > > =20 > > return 0; > > diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c b/drivers/= gpu/drm/arm/display/komeda/komeda_dev.c > > index 4e46f650fddf..c3fa4835cb8d 100644 > > --- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c > > +++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c > > @@ -178,6 +178,9 @@ static int komeda_parse_dt(struct device *dev, stru= ct komeda_dev *mdev) > > } > > } > > =20 > > + mdev->side_by_side =3D !of_property_read_u32(np, "side_by_side_master= ", > > + &mdev->side_by_side_master); > > + > > return ret; > > } > > =20 > > diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.h b/drivers/= gpu/drm/arm/display/komeda/komeda_dev.h > > index d406a4d83352..471604b42431 100644 > > --- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.h > > +++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.h > > @@ -183,6 +183,15 @@ struct komeda_dev { > > =20 > > /** @irq: irq number */ > > int irq; > > + /** > > + * @side_by_side: > > + * > > + * on sbs the whole display frame will be split to two halves (1:2), > > + * master pipeline handles the left part, slave for the right part > > + */ > > + bool side_by_side; >=20 > That's a duplicate of the one in komeda_crtc. You don't need both. >=20 > > + /** @side_by_side_master: master pipe id for side by side */ > > + int side_by_side_master; >=20 > As I detailed above, this should be on the crtc, otherwise we can't > scale to >2 pipes. >=20 > > =20 > > /** @lock: used to protect dpmode */ > > struct mutex lock; > > diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h b/drivers/= gpu/drm/arm/display/komeda/komeda_kms.h > > index 456f3c435719..ae6654fe95e2 100644 > > --- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h > > +++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.h > > @@ -76,6 +76,9 @@ struct komeda_crtc { > > */ > > struct komeda_pipeline *slave; > > =20 > > + /** @side_by_side: if the master and slave works on side by side mode= */ > > + bool side_by_side; > > + > > /** @slave_planes: komeda slave planes mask */ > > u32 slave_planes; > > =20 > > diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c b/dri= vers/gpu/drm/arm/display/komeda/komeda_pipeline.c > > index 452e505a1fd3..104e27cc1dc3 100644 > > --- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c > > +++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c > > @@ -326,14 +326,56 @@ static void komeda_pipeline_assemble(struct komed= a_pipeline *pipe) > > struct komeda_pipeline * > > komeda_pipeline_get_slave(struct komeda_pipeline *master) > > { > > - struct komeda_component *slave; > > + struct komeda_dev *mdev =3D master->mdev; > > + struct komeda_component *comp, *slave; > > + u32 avail_inputs; > > + > > + /* on SBS, slave pipeline merge to master via image processor */ > > + if (mdev->side_by_side) { > > + comp =3D &master->improc->base; > > + avail_inputs =3D KOMEDA_PIPELINE_IMPROCS; > > + } else { > > + comp =3D &master->compiz->base; > > + avail_inputs =3D KOMEDA_PIPELINE_COMPIZS; > > + } > > =20 > > - slave =3D komeda_component_pickup_input(&master->compiz->base, > > - KOMEDA_PIPELINE_COMPIZS); > > + slave =3D komeda_component_pickup_input(comp, avail_inputs); > > =20 > > return slave ? slave->pipeline : NULL; > > } > > =20 > > +static int komeda_assemble_side_by_side(struct komeda_dev *mdev) > > +{ > > + struct komeda_pipeline *master, *slave; > > + int i; > > + > > + if (!mdev->side_by_side) > > + return 0; > > + > > + if (mdev->side_by_side_master >=3D mdev->n_pipelines) { > > + DRM_ERROR("DT configured side by side master-%d is invalid.\n", > > + mdev->side_by_side_master); > > + return -EINVAL; > > + } > > + > > + master =3D mdev->pipelines[mdev->side_by_side_master]; > > + slave =3D komeda_pipeline_get_slave(master); > > + if (!slave || slave->n_layers !=3D master->n_layers) { > > + DRM_ERROR("Current HW doesn't support side by side.\n"); > > + return -EINVAL; > > + } > > + > > + if (!master->dual_link) { > > + DRM_DEBUG_ATOMIC("SBS can not work without dual link.\n"); > > + return -EINVAL; > > + } > > + > > + for (i =3D 0; i < master->n_layers; i++) > > + master->layers[i]->sbs_slave =3D slave->layers[i]; > > + > > + return 0; > > +} > > + > > int komeda_assemble_pipelines(struct komeda_dev *mdev) > > { > > struct komeda_pipeline *pipe; > > @@ -346,7 +388,7 @@ int komeda_assemble_pipelines(struct komeda_dev *md= ev) > > komeda_pipeline_dump(pipe); > > } > > =20 > > - return 0; > > + return komeda_assemble_side_by_side(mdev); > > } > > =20 > > void komeda_pipeline_dump_register(struct komeda_pipeline *pipe, > > diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h b/dri= vers/gpu/drm/arm/display/komeda/komeda_pipeline.h > > index ac8725e24853..20a076cce635 100644 > > --- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h > > +++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h > > @@ -237,6 +237,7 @@ struct komeda_layer { > > * not the source buffer. > > */ > > struct komeda_layer *right; > > + struct komeda_layer *sbs_slave; > > }; > > =20 > > struct komeda_layer_state { > >=20 >=20 >=20 > --=20 > Mihail >=20 >=20