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Subject: Re: [PATCH 3/3] drm/i915: DSI: select correct PWM controller to use
 based on the VBT
To:     =?UTF-8?B?VmlsbGUgU3lyasOkbMOk?= <ville.syrjala@linux.intel.com>
Cc:     Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
        Jani Nikula <jani.nikula@linux.intel.com>,
        Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
        Rodrigo Vivi <rodrigo.vivi@intel.com>,
        "Rafael J . Wysocki" <rjw@rjwysocki.net>,
        Len Brown <lenb@kernel.org>, Lee Jones <lee.jones@linaro.org>,
        Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
        linux-acpi@vger.kernel.org,
        intel-gfx <intel-gfx@lists.freedesktop.org>,
        dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
References: <20191119151818.67531-1-hdegoede@redhat.com>
 <20191119151818.67531-4-hdegoede@redhat.com>
 <20191119154717.GA1208@intel.com>
From:   Hans de Goede <hdegoede@redhat.com>
Message-ID: <0b71327b-4afd-1ff2-3e72-7b1b713f12b7@redhat.com>
Date:   Tue, 19 Nov 2019 17:48:42 +0100
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Hi,

On 19-11-2019 16:47, Ville Syrj=E4l=E4 wrote:
> On Tue, Nov 19, 2019 at 04:18:18PM +0100, Hans de Goede wrote:
>> At least Bay Trail (BYT) and Cherry Trail (CHT) devices can use 1 of 2
>> different PWM controllers for controlling the LCD's backlight brightness=
.
>> Either the one integrated into the PMIC or the one integrated into the
>> SoC (the 1st LPSS PWM controller).
>>
>> So far in the LPSS code on BYT we have skipped registering the LPSS PWM
>> controller "pwm_backlight" lookup entry when a Crystal Cove PMIC is
>> present, assuming that in this case the PMIC PWM controller will be used=
.
>>
>> On CHT we have been relying on only 1 of the 2 PWM controllers being
>> enabled in the DSDT at the same time; and always registered the lookup.
>>
>> So far this has been working, but the correct way to determine which PWM
>> controller needs to be used is by checking a bit in the VBT table and
>> recently I've learned about 2 different BYT devices:
>> Point of View MOBII TAB-P800W
>> Acer Switch 10 SW5-012
>>
>> Which use a Crystal Cove PMIC, yet the LCD is connected to the SoC/LPSS
>> PWM controller (and the VBT correctly indicates this), so here our old
>> heuristics fail.
>>
>> This commit fixes using the wrong PWM controller on these devices by
>> calling pwm_get() for the right PWM controller based on the
>> VBT dsi.config.pwm_blc bit.
>>
>> Note this is part of a series which contains 2 other patches which renam=
es
>> the PWM lookup for the 1st SoC/LPSS PWM from "pwm_backlight" to
>> "pwm_pmic_backlight" and the PWM lookup for the Crystal Cove PMIC PWM
>> from "pwm_backlight" to "pwm_pmic_backlight".
>>
>> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_panel.c | 16 +++++++++++++---
>>   1 file changed, 13 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/dr=
m/i915/display/intel_panel.c
>> index bc14e9c0285a..ddcf311d1114 100644
>> --- a/drivers/gpu/drm/i915/display/intel_panel.c
>> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
>> @@ -1840,13 +1840,22 @@ static int pwm_setup_backlight(struct intel_conn=
ector *connector,
>>   =09=09=09       enum pipe pipe)
>>   {
>>   =09struct drm_device *dev =3D connector->base.dev;
>> +=09struct drm_i915_private *dev_priv =3D to_i915(dev);
>>   =09struct intel_panel *panel =3D &connector->panel;
>> +=09const char *desc;
>>   =09int retval;
>>  =20
>> -=09/* Get the PWM chip for backlight control */
>> -=09panel->backlight.pwm =3D pwm_get(dev->dev, "pwm_backlight");
>> +=09/* Get the right PWM chip for DSI backlight according to VBT */
>> +=09if (dev_priv->vbt.dsi.config->pwm_blc =3D=3D PPS_BLC_PMIC) {
>> +=09=09panel->backlight.pwm =3D pwm_get(dev->dev, "pwm_pmic_backlight");
>> +=09=09desc =3D "PMIC";
>> +=09} else {
>> +=09=09panel->backlight.pwm =3D pwm_get(dev->dev, "pwm_soc_backlight");
>> +=09=09desc =3D "SoC";
>> +=09}
>=20
> Might we want the same thing for the panel enable gpio?


TL;DR: yes but that is for a separate series, which currently only exists i=
n my head.

Longer story:

It looks like on BYT we need to control both VLV_GPIO_NC_10_PANEL1_BKLTEN a=
nd
VLV_GPIO_NC_11_PANEL1_BKLTCTL from vlv_dsi.c when the LPSS is used for PWM.
With BKLTCTL working as a panel_enable (needs to be driven high early on
when initializing the panel) and BKLTEN is just a backlight enable/disable
GPIO.

Without this DSI panels will not light-up on BYT when a HDMI monitor is
connected and the GOP chooses to initialize the HDMI rather then the panel,
since then these 2 pins stay low.

On CHT the MIPI power on/off sequences seem to take care of this themselves=
.

I still want to run some more tests. Currently if I export the 2 gpios in
question in sysfs (since their not claimed yet) and read them they always
read 0. I have the feeling this is caused by the input-buffer not being
enabled on these GPIOs, and that they really are high. So I want to do
a little hack to enable the input buffer and then see if indeed they
are high when the GOP has initialized the panel.

Testing has already shown that driving them high manualy before loading
i915 when the GOP did not init the panel fixes the panel not lighting up.
So I'm pretty sure that this is the case, but I want to verify this before
writing a series for that.

Regards,

Hans


>=20
>> +
>>   =09if (IS_ERR(panel->backlight.pwm)) {
>> -=09=09DRM_ERROR("Failed to own the pwm chip\n");
>> +=09=09DRM_ERROR("Failed to get the %s PWM chip\n", desc);
>>   =09=09panel->backlight.pwm =3D NULL;
>>   =09=09return -ENODEV;
>>   =09}
>> @@ -1873,6 +1882,7 @@ static int pwm_setup_backlight(struct intel_connec=
tor *connector,
>>   =09=09=09=09 CRC_PMIC_PWM_PERIOD_NS);
>>   =09panel->backlight.enabled =3D panel->backlight.level !=3D 0;
>>  =20
>> +=09DRM_INFO("Using %s PWM for LCD backlight control\n", desc);
>>   =09return 0;
>>   }
>>  =20
>> --=20
>> 2.23.0
>=20