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Subject: Re: [PATCH v1 12/17] arm: tegra: Add clock-cells property to Tegra
 pmc
To:     Sowjanya Komatineni <skomatineni@nvidia.com>,
        thierry.reding@gmail.com, jonathanh@nvidia.com,
        mperttunen@nvidia.com, gregkh@linuxfoundation.org,
        sboyd@kernel.org, tglx@linutronix.de, robh+dt@kernel.org,
        mark.rutland@arm.com
Cc:     allison@lohutok.net, pdeschrijver@nvidia.com, pgaikwad@nvidia.com,
        mturquette@baylibre.com, horms+renesas@verge.net.au,
        Jisheng.Zhang@synaptics.com, krzk@kernel.org, arnd@arndb.de,
        spujar@nvidia.com, josephl@nvidia.com, vidyas@nvidia.com,
        daniel.lezcano@linaro.org, mmaddireddy@nvidia.com,
        markz@nvidia.com, devicetree@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org,
        linux-kernel@vger.kernel.org
References: <1574146234-3871-1-git-send-email-skomatineni@nvidia.com>
 <1574146234-3871-13-git-send-email-skomatineni@nvidia.com>
From:   Dmitry Osipenko <digetx@gmail.com>
Message-ID: <e4cbf86b-07b2-f0a1-141f-facb7340a604@gmail.com>
Date:   Tue, 19 Nov 2019 22:32:32 +0300
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19.11.2019 09:50, Sowjanya Komatineni пишет:
> Tegra pmc has 3 clocks clk_out_1, clk_out_2, clk_out_3 with mux and gate
> for each of these clocks as part of pmc and Tegra pmc is the clock provider
> for these clocks.
> 
> This patch adds #clock-cells property with 1 clock specifier to
> the Tegra pmc node.
> 
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
>  arch/arm/boot/dts/tegra114.dtsi | 4 +++-
>  arch/arm/boot/dts/tegra124.dtsi | 4 +++-
>  arch/arm/boot/dts/tegra30.dtsi  | 4 +++-
>  3 files changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
> index 0d7a6327e404..b8f12f24f314 100644
> --- a/arch/arm/boot/dts/tegra114.dtsi
> +++ b/arch/arm/boot/dts/tegra114.dtsi
> @@ -4,6 +4,7 @@
>  #include <dt-bindings/memory/tegra114-mc.h>
>  #include <dt-bindings/pinctrl/pinctrl-tegra.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/soc/tegra-pmc.h>
>  
>  / {
>  	compatible = "nvidia,tegra114";
> @@ -514,11 +515,12 @@
>  		status = "disabled";
>  	};
>  
> -	pmc@7000e400 {
> +	pmc: pmc@7000e400 {
>  		compatible = "nvidia,tegra114-pmc";
>  		reg = <0x7000e400 0x400>;
>  		clocks = <&tegra_car TEGRA114_CLK_PCLK>, <&clk32k_in>;
>  		clock-names = "pclk", "clk32k_in";
> +		#clock-cells = <1>;
>  	};
>  
>  	fuse@7000f800 {
> diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
> index 413bfb981de8..d0802c4ae3bf 100644
> --- a/arch/arm/boot/dts/tegra124.dtsi
> +++ b/arch/arm/boot/dts/tegra124.dtsi
> @@ -6,6 +6,7 @@
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/reset/tegra124-car.h>
>  #include <dt-bindings/thermal/tegra124-soctherm.h>
> +#include <dt-bindings/soc/tegra-pmc.h>
>  
>  / {
>  	compatible = "nvidia,tegra124";
> @@ -595,11 +596,12 @@
>  		clocks = <&tegra_car TEGRA124_CLK_RTC>;
>  	};
>  
> -	pmc@7000e400 {
> +	pmc: pmc@7000e400 {
>  		compatible = "nvidia,tegra124-pmc";
>  		reg = <0x0 0x7000e400 0x0 0x400>;
>  		clocks = <&tegra_car TEGRA124_CLK_PCLK>, <&clk32k_in>;
>  		clock-names = "pclk", "clk32k_in";
> +		#clock-cells = <1>;
>  	};
>  
>  	fuse@7000f800 {
> diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
> index 55ae050042ce..4d5e9d0001d3 100644
> --- a/arch/arm/boot/dts/tegra30.dtsi
> +++ b/arch/arm/boot/dts/tegra30.dtsi
> @@ -4,6 +4,7 @@
>  #include <dt-bindings/memory/tegra30-mc.h>
>  #include <dt-bindings/pinctrl/pinctrl-tegra.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/soc/tegra-pmc.h>
>  
>  / {
>  	compatible = "nvidia,tegra30";
> @@ -714,11 +715,12 @@
>  		status = "disabled";
>  	};
>  
> -	pmc@7000e400 {
> +	pmc: pmc@7000e400 {
>  		compatible = "nvidia,tegra30-pmc";
>  		reg = <0x7000e400 0x400>;
>  		clocks = <&tegra_car TEGRA30_CLK_PCLK>, <&clk32k_in>;
>  		clock-names = "pclk", "clk32k_in";
> +		#clock-cells = <1>;
>  	};
>  
>  	mc: memory-controller@7000f000 {
> 

What about Tegra20?