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Date:   Tue, 19 Nov 2019 22:31:24 +0100
From:   Peter Zijlstra <peterz@infradead.org>
To:     Stephane Eranian <eranian@google.com>
Cc:     "Liang, Kan" <kan.liang@linux.intel.com>,
        Arnaldo Carvalho de Melo <acme@redhat.com>,
        Ingo Molnar <mingo@kernel.org>,
        LKML <linux-kernel@vger.kernel.org>,
        Jiri Olsa <jolsa@kernel.org>,
        Namhyung Kim <namhyung@kernel.org>,
        vitaly.slobodskoy@intel.com, pavel.gerasimov@intel.com,
        Andi Kleen <ak@linux.intel.com>,
        Michael Ellerman <mpe@ellerman.id.au>
Subject: Re: [PATCH V4 03/13] perf tools: Support new branch sample type for
 LBR TOS
Message-ID: <20191119213124.GO3079@worktop.programming.kicks-ass.net>
References: <20191119143411.3482-1-kan.liang@linux.intel.com>
 <20191119143411.3482-4-kan.liang@linux.intel.com>
 <CABPqkBSkTgvbz0S_iv-F5DkUKdqA49k_dLtoh0wbE49ePQ6V=A@mail.gmail.com>
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On Tue, Nov 19, 2019 at 11:00:00AM -0800, Stephane Eranian wrote:
> On Tue, Nov 19, 2019 at 6:35 AM <kan.liang@linux.intel.com> wrote:

> > diff --git a/tools/include/uapi/linux/perf_event.h b/tools/include/uapi/linux/perf_event.h
> > index bb7b271397a6..c2da61c9ace7 100644
> > --- a/tools/include/uapi/linux/perf_event.h
> > +++ b/tools/include/uapi/linux/perf_event.h
> > @@ -180,7 +180,10 @@ enum perf_branch_sample_type_shift {
> >
> >         PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT      = 16, /* save branch type */
> >
> > -       PERF_SAMPLE_BRANCH_MAX_SHIFT            /* non-ABI */
> > +       PERF_SAMPLE_BRANCH_MAX_SHIFT            = 17, /* non-ABI */
> > +
> > +       /* PMU specific */
> 
> No! You must abstract this.
> 
> > +       PERF_SAMPLE_BRANCH_LBR_TOS_SHIFT        = 63, /* save LBR TOS */
> >  };
> >
> I don't like this because this is too Intel specific.
> What is the meaning of this field? You need a clear definition so it can be used
> with other PERF_SAMPLE_BRANCH_* implementations.

I also detest the MSB usage. Normal pattern is that any bit >= MAX
will be rejected by the kernel.