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Subject: Re: [PATCH v2 13/18] firmware: qcom_scm-32: Move SMCCC register filling to qcom_scm_call
From:   Stephen Boyd <swboyd@chromium.org>
Cc:     Elliot Berman <eberman@codeaurora.org>, tsoni@codeaurora.org,
        sidgup@codeaurora.org, psodagud@codeaurora.org,
        linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org
To:     Elliot Berman <eberman@codeaurora.org>, agross@kernel.org,
        bjorn.andersson@linaro.org, saiprakash.ranjan@codeaurora.org
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Date:   Tue, 19 Nov 2019 14:05:12 -0800
Sender: linux-kernel-owner@vger.kernel.org
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Quoting Elliot Berman (2019-11-12 13:22:49)
> - Move SMCCC register filling to qcom_scm_call so that qcom_scm_call_do
>   only needs to concern itself with retry mechanism.
> - Use arm_smccc_args struct in atomic variants as well.

This is two things. Please split the patch.

> @@ -266,10 +272,14 @@ static int qcom_scm_call(struct device *dev, struct=
 qcom_scm_desc *desc)
>  static s32 qcom_scm_call_atomic1(u32 svc, u32 cmd, u32 arg1)
>  {
>         int context_id;
> +       struct arm_smccc_args smc =3D {0};
>         struct arm_smccc_res res;
> =20
> -       arm_smccc_smc(LEGACY_ATOMIC_ID(svc, cmd, 1), (unsigned long)&cont=
ext_id,
> -                     arg1, 0, 0, 0, 0, 0, &res);
> +       smc.a[0] =3D LEGACY_ATOMIC_ID(svc, cmd, 1);
> +       smc.a[1] =3D (unsigned long)&context_id;
> +       smc.a[2] =3D arg1;
> +       arm_smccc_smc(smc.a[0], smc.a[1], smc.a[2], smc.a[3],
> +                     smc.a[4], smc.a[5], smc.a[6], smc.a[7], &res);
> =20
>         return res.a0;
>  }
> @@ -287,10 +297,15 @@ static s32 qcom_scm_call_atomic1(u32 svc, u32 cmd, =
u32 arg1)
>  static s32 qcom_scm_call_atomic2(u32 svc, u32 cmd, u32 arg1, u32 arg2)
>  {
>         int context_id;
> +       struct arm_smccc_args smc =3D {0};
>         struct arm_smccc_res res;
> =20
> -       arm_smccc_smc(LEGACY_ATOMIC_ID(svc, cmd, 2), (unsigned long)&cont=
ext_id,
> -                     arg1, arg2, 0, 0, 0, 0, &res);
> +       smc.a[0] =3D LEGACY_ATOMIC_ID(svc, cmd, 2);
> +       smc.a[1] =3D (unsigned long)&context_id;
> +       smc.a[2] =3D arg1;
> +       smc.a[3] =3D arg2;
> +       arm_smccc_smc(smc.a[0], smc.a[1], smc.a[2], smc.a[3],
> +                     smc.a[4], smc.a[5], smc.a[6], smc.a[7], &res);
> =20
>         return res.a0;
>  }

Why are we changing the above two hunks? It's the same code with more
lines right?