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From:   Greentime Hu <green.hu@gmail.com>
Date:   Thu, 21 Nov 2019 17:14:25 +0800
Message-ID: <CAEbi=3crLgPYNGmO+6TCrxMYxMj3aD1e2jqTxnnsCzTeAZX48g@mail.gmail.com>
Subject: Re: [PATCH] nds32: Fix typo in Kconfig.cpu
To:     Masanari Iida <standby24x7@gmail.com>
Cc:     Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Vincent Chen <deanbo422@gmail.com>,
        Greentime <greentime@andestech.com>,
        Vincent Chen <vincentc@andestech.com>
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Masanari Iida <standby24x7@gmail.com> =E6=96=BC 2019=E5=B9=B48=E6=9C=8814=
=E6=97=A5 =E9=80=B1=E4=B8=89 =E4=B8=8A=E5=8D=8811:45=E5=AF=AB=E9=81=93=EF=
=BC=9A
>
> This patch fixes some spelling typo in Kconfig.cpu
>
> Signed-off-by: Masanari Iida <standby24x7@gmail.com>
> ---
>  arch/nds32/Kconfig.cpu | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/nds32/Kconfig.cpu b/arch/nds32/Kconfig.cpu
> index f80a4ab63da2..f88a12fdf0f3 100644
> --- a/arch/nds32/Kconfig.cpu
> +++ b/arch/nds32/Kconfig.cpu
> @@ -13,7 +13,7 @@ config FPU
>         default n
>         help
>           If FPU ISA is used in user space, this configuration shall be Y=
 to
> -          enable required support in kerenl such as fpu context switch a=
nd
> +          enable required support in kernel such as fpu context switch a=
nd
>            fpu exception handler.
>
>           If no FPU ISA is used in user space, say N.
> @@ -27,7 +27,7 @@ config LAZY_FPU
>            enhance system performance by reducing the context switch
>           frequency of the FPU register.
>
> -         For nomal case, say Y.
> +         For normal case, say Y.
>
>  config SUPPORT_DENORMAL_ARITHMETIC
>         bool "Denormal arithmetic support"
> @@ -36,7 +36,7 @@ config SUPPORT_DENORMAL_ARITHMETIC
>         help
>           Say Y here to enable arithmetic of denormalized number. Enablin=
g
>           this feature can enhance the precision for tininess number.
> -         However, performance loss in float pointe calculations is
> +         However, performance loss in float point calculations is
>           possibly significant due to additional FPU exception.
>
>           If the calculated tolerance for tininess number is not critical=
,
> @@ -73,7 +73,7 @@ choice
>           the cache aliasing issue. The rest cpus(N13, N10 and D10) are
>           implemented as VIPT data cache. It may cause the cache aliasing=
 issue
>           if its cache way size is larger than page size. You can specify=
 the
> -         CPU type direcly or choose CPU_V3 if unsure.
> +         CPU type directly or choose CPU_V3 if unsure.
>
>            A kernel built for N10 is able to run on N15, D15, N13, N10 or=
 D10.
>            A kernel built for N15 is able to run on N15 or D15.

Thanks, Masanari.
Acked-by: Greentime Hu <green.hu@gmail.com>

I will queue it in nds32 next tree.