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From:   Andy Lutomirski <luto@amacapital.net>
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Subject: Re: [PATCH v10 4/6] x86/split_lock: Enumerate split lock detection if the IA32_CORE_CAPABILITIES MSR is not supported
Date:   Thu, 21 Nov 2019 14:07:38 -0800
Message-Id: <D4D6F51D-D791-4B78-8FCA-5D419B1D079C@amacapital.net>
References: <1574297603-198156-5-git-send-email-fenghua.yu@intel.com>
Cc:     Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
        H Peter Anvin <hpa@zytor.com>,
        Peter Zijlstra <peterz@infradead.org>,
        Tony Luck <tony.luck@intel.com>,
        Ashok Raj <ashok.raj@intel.com>,
        Ravi V Shankar <ravi.v.shankar@intel.com>,
        linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>
In-Reply-To: <1574297603-198156-5-git-send-email-fenghua.yu@intel.com>
To:     Fenghua Yu <fenghua.yu@intel.com>
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk


> On Nov 20, 2019, at 5:45 PM, Fenghua Yu <fenghua.yu@intel.com> wrote:
>=20
> =EF=BB=BFArchitecturally the split lock detection feature is enumerated by=

> IA32_CORE_CAPABILITIES MSR and future CPU models will indicate presence
> of the feature by setting bit 5. But the feature is present in a few
> older models where split lock detection is enumerated by the CPU models.
>=20
> Use a "x86_cpu_id" table to list the older CPU models with the feature.
>=20

This may need to be disabled if the HYPERVISOR bit is set.=