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Date:   Fri, 22 Nov 2019 10:46:35 +0100
From:   Peter Zijlstra <peterz@infradead.org>
To:     Andy Lutomirski <luto@amacapital.net>
Cc:     Fenghua Yu <fenghua.yu@intel.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
        H Peter Anvin <hpa@zytor.com>,
        Tony Luck <tony.luck@intel.com>,
        Ashok Raj <ashok.raj@intel.com>,
        Ravi V Shankar <ravi.v.shankar@intel.com>,
        linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>
Subject: Re: [PATCH v10 4/6] x86/split_lock: Enumerate split lock detection
 if the IA32_CORE_CAPABILITIES MSR is not supported
Message-ID: <20191122094635.GC4097@hirez.programming.kicks-ass.net>
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 <5A85615E-EFFF-4DF3-A1A5-DB8532451A42@amacapital.net>
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On Thu, Nov 21, 2019 at 06:13:18PM -0800, Andy Lutomirski wrote:

> You seem to be assuming that certain model CPUs have this feature even
> if not enumerated. You need to make sure you don’t try to use it in a
> VM without the hypervisor giving you an indication that it’s available
> and permitted. My suggestion is to disable model-based enumeration if
> HYPERVISOR is set.  You should also consider probing the MSR to double
> check even if you don’t think you have a hypervisor.

Yep, in patch 6 this results in an unconditinoal WRMSR, which, when ran
under a HV, will explode most mighty.

He doesn't double check, doesn't use wrmsrl_safe()...