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[209.132.180.67]) by mx.google.com with ESMTP id pv22si4096261ejb.337.2019.11.22.04.41.03; Fri, 22 Nov 2019 04:41:30 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=wPFNW57z; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727404AbfKVMjc (ORCPT + 99 others); Fri, 22 Nov 2019 07:39:32 -0500 Received: from mail-ot1-f66.google.com ([209.85.210.66]:39476 "EHLO mail-ot1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726620AbfKVMjc (ORCPT ); Fri, 22 Nov 2019 07:39:32 -0500 Received: by mail-ot1-f66.google.com with SMTP id w24so6037014otk.6 for ; Fri, 22 Nov 2019 04:39:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=pIaE2t8kEhzDVYCOk21I3VO5ugELTHI5U7MvhDfP+Bw=; b=wPFNW57zKwWO86/8XbUcXJJRoWhRtgaz8SFbCVb3kzCZs5NoKJ5NAi5XITr/5axrWF 7t/bmKwgoI/qdkwMUMKfuO+JQl+KF3HA6koatw564ZgsHkf3LTN617naBAfhOMLIk1jZ UHtrysleLqU2AQjrR/Qy+bepkiaXKqSBtTLbQlDmapNYB9kdfzlMSB4DFre/jEwUF15D P4ChWAELcH4Fly7afKA1+MiGJLmLKPBjBPpU+ZSFXBtlLmgYQEerSeMbL04k3cDXdeYH u658C2PbUnrGIPJl+JsiWXXiN0wUe5kS+NfcvxGIKAHHshIVt2KylgTsXH3ib1SkOmx6 Rosg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=pIaE2t8kEhzDVYCOk21I3VO5ugELTHI5U7MvhDfP+Bw=; b=hgD/gKbxN7DRHgEsGBnEP4KIyDTw3H/GoP91/toYaf9FuOhAekgejqxEAUyIt7EQ7X SlYrg43VSmsbUOWtfvoAEZbYuMzTS+vWR85hodWrLbWMsDvfcP1H66Xm3s/V+LJTkFsT 9wjVyFtOEMUmLruFu1dZNtch0gnyWsh4T9KJjGMpVC4wP1W/7eO8SkcFQqAX+rFa8Lj2 B8JNisbV5egpLy6/m4IIGd2iv09pf1vtipG9PhSidf1RRlz2i+2YQeCnllosaJKyZO6p p3GQ2/949ImaQWZat8QYeUlum/j6nAXjN7jmEeZFxzwU4RdjXWLaXw6pZt0u8TZ3sP/y dd4w== X-Gm-Message-State: APjAAAWLxpRq7y/jGBVvK2HEEfSY7bqXpWcfRkrSRnUyvmeUwDmP/Xz1 tBDo49W9k7HgE5nDlqMxP9u/+kDZ7BmWaEjCznQXEA== X-Received: by 2002:a9d:17ca:: with SMTP id j68mr10551757otj.250.1574426371219; Fri, 22 Nov 2019 04:39:31 -0800 (PST) MIME-Version: 1.0 References: <1573560684-48104-1-git-send-email-yash.shah@sifive.com> <1573560684-48104-4-git-send-email-yash.shah@sifive.com> In-Reply-To: From: Bartosz Golaszewski Date: Fri, 22 Nov 2019 13:39:20 +0100 Message-ID: Subject: Re: [PATCH 3/4] gpio: sifive: Add GPIO driver for SiFive SoCs To: Linus Walleij Cc: Yash Shah , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "palmer@dabbelt.com" , "Paul Walmsley ( Sifive)" , "aou@eecs.berkeley.edu" , "tglx@linutronix.de" , "jason@lakedaemon.net" , "maz@kernel.org" , "bmeng.cn@gmail.com" , "atish.patra@wdc.com" , Sagar Kadam , "linux-gpio@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-riscv@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Sachin Ghadi Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org pt., 22 lis 2019 o 13:28 Linus Walleij napisa=C5= =82(a): > > On Tue, Nov 19, 2019 at 5:42 PM Bartosz Golaszewski > wrote: > > wt., 19 lis 2019 o 16:03 Linus Walleij napis= a=C5=82(a): > > > On Mon, Nov 18, 2019 at 11:15 AM Bartosz Golaszewski > > > wrote: > > > > > pon., 18 lis 2019 o 11:03 Yash Shah napisa= =C5=82(a): > > > Is it really so? The bgpio_lock does protect the registers used > > > by regmap-mmio but unless the interrupt code is also using the > > > same registers it is fine to have a different lock for those. > > > > > > Is the interrupt code really poking into the very same registers > > > as passed to bgpio_init()? > > > > > > Of course it could be seen as a bit dirty to poke around in the > > > same memory space with regmap and the bgpio_* accessors > > > but in practice it's no problem if they never touch the same > > > things. > > > > > > Yours, > > > Linus Walleij > > > > I'm wondering if it won't cause any inconsistencies when for example > > interrupts are being triggered on input lines while we're also reading > > their values? Seems to me it's just more clear to use a single lock > > for a register range. Most drivers using gpio-mmio do just that in > > their irq-related routines. > > OK good point. Just one lock for the whole thing is likely > more maintainable even if it works with two different locks. > > > Anyway: even without using bgpio_lock this code is inconsistent: if > > we're using regmap for interrupt registers, we should either decide to > > rely on locking provided by regmap or disable it and use a locally > > defined lock. > > OK makes sense, let's say we use the bgpio_lock everywhere > for this. > > Yash: are you OK with this? (Haven't read the new patch set > yet, maybe it is already fixed...) > > > Also: if we're using regmap, then let's use it > > everywhere, not only when it's convenient for updating registers. > > I think what you are saying is that we should extend gpio-mmio.c > with some optional regmap API (or create a separate MMIO library > for regmap consumers) which makes sense, but it feels a bit > heavy task to toss at contributors. > > We could add it to the TODO file, where I already have some > item like this for port-mapped I/O. > It's been on my personal TODO list too for some time as it seems it could benefit some i2c drivers too. Also: I think such a helper could eventually completely replace the generic drivers such as gpio-mmio and gpio-reg. In other words: good idea to put it into the TODO. If there are no objections I was thinking about starting the work soon aiming at v5.6, as soon as we get the recent changes in uAPI out of the way. Bart > Yours, > Linus Walleij