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From:   Lyude Paul <lyude@redhat.com>
To:     intel-gfx@lists.freedesktop.org
Cc:     Furquan Shaikh <furquan@google.com>,
        Jani Nikula <jani.nikula@linux.intel.com>,
        Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
        Rodrigo Vivi <rodrigo.vivi@intel.com>,
        David Airlie <airlied@linux.ie>,
        Daniel Vetter <daniel@ffwll.ch>,
        Chris Wilson <chris@chris-wilson.co.uk>,
        =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= 
        <ville.syrjala@linux.intel.com>,
        Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
        Imre Deak <imre.deak@intel.com>,
        Lee Shawn C <shawn.c.lee@intel.com>,
        dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: [PATCH 1/5] drm/i915: Fix eDP DPCD aux max backlight calculations
Date:   Fri, 22 Nov 2019 18:15:59 -0500
Message-Id: <20191122231616.2574-2-lyude@redhat.com>
In-Reply-To: <20191122231616.2574-1-lyude@redhat.com>
References: <20191122231616.2574-1-lyude@redhat.com>
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Max backlight value for the panel was being calculated using byte
count i.e. 0xffff if 2 bytes are supported for backlight brightness
and 0xff if 1 byte is supported. However, EDP_PWMGEN_BIT_COUNT
determines the number of active control bits used for the brightness
setting. Thus, even if the panel uses 2 byte setting, it might not use
all the control bits. Thus, max backlight should be set based on the
value of EDP_PWMGEN_BIT_COUNT instead of assuming 65535 or 255.

Additionally, EDP_PWMGEN_BIT_COUNT was being updated based on the VBT
frequency which results in a different max backlight value. Thus,
setting of EDP_PWMGEN_BIT_COUNT is moved to setup phase instead of
enable so that max backlight can be calculated correctly. Only the
frequency divider is set during the enable phase using the value of
EDP_PWMGEN_BIT_COUNT.

This is based off the original patch series from Furquan Shaikh
<furquan@google.com>:

https://patchwork.freedesktop.org/patch/317255/?series=3D62326&rev=3D3

Changes since original patch:
* Remove unused intel_dp variable in intel_dp_aux_setup_backlight()
* Fix checkpatch issues
* Make sure that we rewrite the pwmgen bit count whenever we bring the
  panel out of D3 mode

Cc: Furquan Shaikh <furquan@google.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
---
 .../drm/i915/display/intel_display_types.h    |   3 +
 .../drm/i915/display/intel_dp_aux_backlight.c | 139 ++++++++++++------
 2 files changed, 95 insertions(+), 47 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/g=
pu/drm/i915/display/intel_display_types.h
index 83ea04149b77..2a8d8cae638e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -214,6 +214,9 @@ struct intel_panel {
 =09=09u8 controller;=09=09/* bxt+ only */
 =09=09struct pwm_device *pwm;
=20
+=09=09/* DPCD backlight */
+=09=09u8 pwmgen_bit_count;
+
 =09=09struct backlight_device *device;
=20
 =09=09/* Connector and platform specific backlight functions */
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/driver=
s/gpu/drm/i915/display/intel_dp_aux_backlight.c
index 020422da2ae2..fad470553cf9 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
@@ -111,61 +111,28 @@ static bool intel_dp_aux_set_pwm_freq(struct intel_co=
nnector *connector)
 {
 =09struct drm_i915_private *dev_priv =3D to_i915(connector->base.dev);
 =09struct intel_dp *intel_dp =3D enc_to_intel_dp(&connector->encoder->base=
);
-=09int freq, fxp, fxp_min, fxp_max, fxp_actual, f =3D 1;
-=09u8 pn, pn_min, pn_max;
+=09const u8 pn =3D connector->panel.backlight.pwmgen_bit_count;
+=09int freq, fxp, f, fxp_actual, fxp_min, fxp_max;
=20
-=09/* Find desired value of (F x P)
-=09 * Note that, if F x P is out of supported range, the maximum value or
-=09 * minimum value will applied automatically. So no need to check that.
-=09 */
 =09freq =3D dev_priv->vbt.backlight.pwm_freq_hz;
-=09DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n", freq);
 =09if (!freq) {
 =09=09DRM_DEBUG_KMS("Use panel default backlight frequency\n");
 =09=09return false;
 =09}
=20
 =09fxp =3D DIV_ROUND_CLOSEST(KHz(DP_EDP_BACKLIGHT_FREQ_BASE_KHZ), freq);
+=09f =3D clamp(DIV_ROUND_CLOSEST(fxp, 1 << pn), 1, 255);
+=09fxp_actual =3D f << pn;
=20
-=09/* Use highest possible value of Pn for more granularity of brightness
-=09 * adjustment while satifying the conditions below.
-=09 * - Pn is in the range of Pn_min and Pn_max
-=09 * - F is in the range of 1 and 255
-=09 * - FxP is within 25% of desired value.
-=09 *   Note: 25% is arbitrary value and may need some tweak.
-=09 */
-=09if (drm_dp_dpcd_readb(&intel_dp->aux,
-=09=09=09       DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, &pn_min) !=3D 1) {
-=09=09DRM_DEBUG_KMS("Failed to read pwmgen bit count cap min\n");
-=09=09return false;
-=09}
-=09if (drm_dp_dpcd_readb(&intel_dp->aux,
-=09=09=09       DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX, &pn_max) !=3D 1) {
-=09=09DRM_DEBUG_KMS("Failed to read pwmgen bit count cap max\n");
-=09=09return false;
-=09}
-=09pn_min &=3D DP_EDP_PWMGEN_BIT_COUNT_MASK;
-=09pn_max &=3D DP_EDP_PWMGEN_BIT_COUNT_MASK;
-
+=09/* Ensure frequency is within 25% of desired value */
 =09fxp_min =3D DIV_ROUND_CLOSEST(fxp * 3, 4);
 =09fxp_max =3D DIV_ROUND_CLOSEST(fxp * 5, 4);
-=09if (fxp_min < (1 << pn_min) || (255 << pn_max) < fxp_max) {
-=09=09DRM_DEBUG_KMS("VBT defined backlight frequency out of range\n");
-=09=09return false;
-=09}
-
-=09for (pn =3D pn_max; pn >=3D pn_min; pn--) {
-=09=09f =3D clamp(DIV_ROUND_CLOSEST(fxp, 1 << pn), 1, 255);
-=09=09fxp_actual =3D f << pn;
-=09=09if (fxp_min <=3D fxp_actual && fxp_actual <=3D fxp_max)
-=09=09=09break;
-=09}
=20
-=09if (drm_dp_dpcd_writeb(&intel_dp->aux,
-=09=09=09       DP_EDP_PWMGEN_BIT_COUNT, pn) < 0) {
-=09=09DRM_DEBUG_KMS("Failed to write aux pwmgen bit count\n");
+=09if (fxp_min > fxp_actual || fxp_actual > fxp_max) {
+=09=09DRM_DEBUG_KMS("Actual frequency out of range\n");
 =09=09return false;
 =09}
+
 =09if (drm_dp_dpcd_writeb(&intel_dp->aux,
 =09=09=09       DP_EDP_BACKLIGHT_FREQ_SET, (u8) f) < 0) {
 =09=09DRM_DEBUG_KMS("Failed to write aux backlight freq\n");
@@ -178,6 +145,7 @@ static void intel_dp_aux_enable_backlight(const struct =
intel_crtc_state *crtc_st
 =09=09=09=09=09  const struct drm_connector_state *conn_state)
 {
 =09struct intel_connector *connector =3D to_intel_connector(conn_state->co=
nnector);
+=09struct intel_panel *panel =3D &connector->panel;
 =09struct intel_dp *intel_dp =3D enc_to_intel_dp(&connector->encoder->base=
);
 =09u8 dpcd_buf, new_dpcd_buf, edp_backlight_mode;
=20
@@ -197,6 +165,12 @@ static void intel_dp_aux_enable_backlight(const struct=
 intel_crtc_state *crtc_st
 =09case DP_EDP_BACKLIGHT_CONTROL_MODE_PRODUCT:
 =09=09new_dpcd_buf &=3D ~DP_EDP_BACKLIGHT_CONTROL_MODE_MASK;
 =09=09new_dpcd_buf |=3D DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD;
+
+=09=09if (drm_dp_dpcd_writeb(&intel_dp->aux,
+=09=09=09=09       DP_EDP_PWMGEN_BIT_COUNT,
+=09=09=09=09       panel->backlight.pwmgen_bit_count) < 0)
+=09=09=09DRM_DEBUG_KMS("Failed to write aux pwmgen bit count\n");
+
 =09=09break;
=20
 =09/* Do nothing when it is already DPCD mode */
@@ -225,20 +199,91 @@ static void intel_dp_aux_disable_backlight(const stru=
ct drm_connector_state *old
 =09set_aux_backlight_enable(enc_to_intel_dp(old_conn_state->best_encoder),=
 false);
 }
=20
+static u32 intel_dp_aux_calc_max_backlight(struct intel_connector *connect=
or)
+{
+=09struct drm_i915_private *dev_priv =3D to_i915(connector->base.dev);
+=09struct intel_dp *intel_dp =3D enc_to_intel_dp(&connector->encoder->base=
);
+=09struct intel_panel *panel =3D &connector->panel;
+=09u32 max_backlight =3D 0;
+=09int freq, fxp, fxp_min, fxp_max, fxp_actual, f =3D 1;
+=09u8 pn, pn_min, pn_max;
+
+=09if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_PWMGEN_BIT_COUNT, &pn)) {
+=09=09pn &=3D DP_EDP_PWMGEN_BIT_COUNT_MASK;
+=09=09max_backlight =3D (1 << pn) - 1;
+=09}
+
+=09/* Find desired value of (F x P)
+=09 * Note that, if F x P is out of supported range, the maximum value or
+=09 * minimum value will applied automatically. So no need to check that.
+=09 */
+=09freq =3D dev_priv->vbt.backlight.pwm_freq_hz;
+=09DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n", freq);
+=09if (!freq) {
+=09=09DRM_DEBUG_KMS("Use panel default backlight frequency\n");
+=09=09return max_backlight;
+=09}
+
+=09fxp =3D DIV_ROUND_CLOSEST(KHz(DP_EDP_BACKLIGHT_FREQ_BASE_KHZ), freq);
+
+=09/* Use highest possible value of Pn for more granularity of brightness
+=09 * adjustment while satifying the conditions below.
+=09 * - Pn is in the range of Pn_min and Pn_max
+=09 * - F is in the range of 1 and 255
+=09 * - FxP is within 25% of desired value.
+=09 *   Note: 25% is arbitrary value and may need some tweak.
+=09 */
+=09if (drm_dp_dpcd_readb(&intel_dp->aux,
+=09=09=09      DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, &pn_min) !=3D 1) {
+=09=09DRM_DEBUG_KMS("Failed to read pwmgen bit count cap min\n");
+=09=09return max_backlight;
+=09}
+=09if (drm_dp_dpcd_readb(&intel_dp->aux,
+=09=09=09      DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX, &pn_max) !=3D 1) {
+=09=09DRM_DEBUG_KMS("Failed to read pwmgen bit count cap max\n");
+=09=09return max_backlight;
+=09}
+=09pn_min &=3D DP_EDP_PWMGEN_BIT_COUNT_MASK;
+=09pn_max &=3D DP_EDP_PWMGEN_BIT_COUNT_MASK;
+
+=09fxp_min =3D DIV_ROUND_CLOSEST(fxp * 3, 4);
+=09fxp_max =3D DIV_ROUND_CLOSEST(fxp * 5, 4);
+=09if (fxp_min < (1 << pn_min) || (255 << pn_max) < fxp_max) {
+=09=09DRM_DEBUG_KMS("VBT defined backlight frequency out of range\n");
+=09=09return max_backlight;
+=09}
+
+=09for (pn =3D pn_max; pn >=3D pn_min; pn--) {
+=09=09f =3D clamp(DIV_ROUND_CLOSEST(fxp, 1 << pn), 1, 255);
+=09=09fxp_actual =3D f << pn;
+=09=09if (fxp_min <=3D fxp_actual && fxp_actual <=3D fxp_max)
+=09=09=09break;
+=09}
+
+=09DRM_DEBUG_KMS("Using eDP pwmgen bit count of %d\n", pn);
+=09if (drm_dp_dpcd_writeb(&intel_dp->aux,
+=09=09=09       DP_EDP_PWMGEN_BIT_COUNT, pn) < 0) {
+=09=09DRM_DEBUG_KMS("Failed to write aux pwmgen bit count\n");
+=09=09return max_backlight;
+=09}
+=09panel->backlight.pwmgen_bit_count =3D pn;
+
+=09max_backlight =3D (1 << pn) - 1;
+
+=09return max_backlight;
+}
+
 static int intel_dp_aux_setup_backlight(struct intel_connector *connector,
 =09=09=09=09=09enum pipe pipe)
 {
-=09struct intel_dp *intel_dp =3D enc_to_intel_dp(&connector->encoder->base=
);
 =09struct intel_panel *panel =3D &connector->panel;
=20
-=09if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT)
-=09=09panel->backlight.max =3D 0xFFFF;
-=09else
-=09=09panel->backlight.max =3D 0xFF;
+=09panel->backlight.max =3D intel_dp_aux_calc_max_backlight(connector);
+=09if (!panel->backlight.max)
+=09=09return -ENODEV;
=20
 =09panel->backlight.min =3D 0;
 =09panel->backlight.level =3D intel_dp_aux_get_backlight(connector);
-
 =09panel->backlight.enabled =3D panel->backlight.level !=3D 0;
=20
 =09return 0;
--=20
2.21.0