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[78.144.219.162]) by smtp.gmail.com with ESMTPSA id c11sm3882418wrv.92.2019.11.23.16.02.34 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 23 Nov 2019 16:02:34 -0800 (PST) Date: Sun, 24 Nov 2019 00:02:33 +0000 From: Sudip Mukherjee To: Jiri Slaby Cc: Greg Kroah-Hartman , linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/2] tty: use tty_init_dev_retry() to workaround a race condition Message-ID: <20191124000233.xc2rp5umut4g3mnx@debian> References: <20191121152239.28405-1-sudipm.mukherjee@gmail.com> <20191121152239.28405-2-sudipm.mukherjee@gmail.com> <20191121164138.GD651886@kroah.com> <20191121210155.limd7v6cpd5yz2e7@debian> <674a05c6-67d7-f337-f529-ca1c62c35624@suse.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <674a05c6-67d7-f337-f529-ca1c62c35624@suse.com> User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Nov 22, 2019 at 10:11:26AM +0100, Jiri Slaby wrote: > On 22. 11. 19, 10:05, Jiri Slaby wrote: > > On 21. 11. 19, 22:01, Sudip Mukherjee wrote: > >> Hi Greg, > >> > >> On Thu, Nov 21, 2019 at 05:41:38PM +0100, Greg Kroah-Hartman wrote: > >>> On Thu, Nov 21, 2019 at 03:22:39PM +0000, Sudip Mukherjee wrote: > >>>> There seems to be a race condition in tty drivers and I could see on > >>>> many boot cycles a NULL pointer dereference as tty_init_dev() tries to > > > > Interferences of console vs tty code are ugly. Does it help to simply > > put tty_port_link_device to uart_add_one_port before uart_configure_port? > > Alternatively, you can try setting tty_port in uart_install by: > tty->port = &state->port. I have not tried these. will try. > > BTW do you see the warning from tty_init_dev: > "driver does not set tty->port. This will crash the kernel later. Fix > the driver!\n" > ? Maybe not given console is registered already, but crashes. yes. I do see the warning but I have always assumed that the warning is because console is openend as soon as it registers and so uart_add_one_port() does not get the chance to link it. Is it not so? -- Regards Sudip