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From:   Avri Altman <Avri.Altman@wdc.com>
To:     Can Guo <cang@codeaurora.org>,
        "asutoshd@codeaurora.org" <asutoshd@codeaurora.org>,
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CC:     Alim Akhtar <alim.akhtar@samsung.com>,
        Pedro Sousa <pedrom.sousa@synopsys.com>,
        "James E.J. Bottomley" <jejb@linux.ibm.com>,
        "Martin K. Petersen" <martin.petersen@oracle.com>,
        Stanley Chu <stanley.chu@mediatek.com>,
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        Tomas Winkler <tomas.winkler@intel.com>,
        Thomas Gleixner <tglx@linutronix.de>,
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        open list <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH v4 4/5] scsi: ufs: Do not clear the DL layer timers
Thread-Topic: [PATCH v4 4/5] scsi: ufs: Do not clear the DL layer timers
Thread-Index: AQHVmee89Uj0xO4g1EKSBfsTmVIai6eUMy8AgAda3iA=
Date:   Mon, 25 Nov 2019 07:22:35 +0000
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> >
> > During power mode change, PACP_PWR_Req frame sends
> PAPowerModeUserData
> > parameters (and they are considered valid by device if Flags[4] -
> > UserDataValid bit is set in the same frame).
> > Currently we don't set these PAPowerModeUserData parameters and
> > hardware always sets UserDataValid bit which would clear all the DL
> > layer timeout values of the peer device after the power mode change.
> >
> > This change sets the PAPowerModeUserData[0..5] to UniPro specification
> > recommended default values, in addition we are also setting the
> > relevant
> > DME_LOCAL_* timer attributes as required by UFS HCI specification.
> >
> > Signed-off-by: Can Guo <cang@codeaurora.org>
> Reviewed-by Avri Altman <avri.altman@wdc.com>
BTW, I noticed that you are only updating the TC0 registers.
Why not setting the TC1 registers as well?

Thanks,
Avri