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[209.132.180.67]) by mx.google.com with ESMTP id l1si4779066edw.274.2019.11.25.04.36.14; Mon, 25 Nov 2019 04:36:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b="mt9ZR1H/"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727332AbfKYMNE (ORCPT + 99 others); Mon, 25 Nov 2019 07:13:04 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:22676 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726694AbfKYMND (ORCPT ); Mon, 25 Nov 2019 07:13:03 -0500 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id xAPC7NV4010189; Mon, 25 Nov 2019 13:12:47 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=STMicroelectronics; bh=B96CApp49j4YYM/RFvkEEuoU4iXI/Y4YuviO4WS8EUY=; b=mt9ZR1H/+mFOsjxEYRHVNZ5tNAfE7e2lvYXjjdMo86Uym+fxIlIDV72W2ib0ylr3+c9+ +RbbW8Ws/G5d1/JONKnJPD0urh0K/0/Z6Wzqm3ghA/CcnqcBfJqtg09wVrYL1E/9fZez Z5FyBpBeay21PvKV2qJuT6kU8hI7GimW/0xL8trLou2AlFWTd5JUhlHrIHT/UUIQCNyN a4aW3HBpe+nPDvMRWfbxm1+unf3eKuSJhYsXCylo9vw28+UHR/bWJwmVbmt2uO/q4AWs V/mJJHLxhZrr3Ln/0ApdpPXJnWqc4jNw/q494oHFn7Fi5oXwC7zxl8ATUzaRoYAsOBRv mw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2weudw107m-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 25 Nov 2019 13:12:47 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3941210002A; Mon, 25 Nov 2019 13:12:47 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag3node3.st.com [10.75.127.9]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 2AE512BE238; Mon, 25 Nov 2019 13:12:47 +0100 (CET) Received: from localhost (10.75.127.49) by SFHDAG3NODE3.st.com (10.75.127.9) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 25 Nov 2019 13:12:46 +0100 From: Benjamin Gaignard To: , , CC: , , , , Benjamin Gaignard Subject: [PATCH] ARM: dts: stm32: remove "@" from stm32f7 pinmux groups Date: Mon, 25 Nov 2019 13:12:43 +0100 Message-ID: <20191125121244.19591-1-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.49] X-ClientProxiedBy: SFHDAG6NODE1.st.com (10.75.127.16) To SFHDAG3NODE3.st.com (10.75.127.9) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,18.0.572 definitions=2019-11-25_03:2019-11-21,2019-11-25 signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace all "@" by "_" in pinmux groups for stm32f7 family. This avoid errors when using yaml to check the bindings. Signed-off-by: Benjamin Gaignard --- arch/arm/boot/dts/stm32f7-pinctrl.dtsi | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi index 9314128df185..5271df1017cb 100644 --- a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi @@ -127,7 +127,7 @@ st,bank-name = "GPIOK"; }; - cec_pins_a: cec@0 { + cec_pins_a: cec_0 { pins { pinmux = ; /* HDMI CEC */ slew-rate = <0>; @@ -136,7 +136,7 @@ }; }; - usart1_pins_a: usart1@0 { + usart1_pins_a: usart1_0 { pins1 { pinmux = ; /* USART1_TX */ bias-disable; @@ -149,7 +149,7 @@ }; }; - usart1_pins_b: usart1@1 { + usart1_pins_b: usart1_1 { pins1 { pinmux = ; /* USART1_TX */ bias-disable; @@ -162,7 +162,7 @@ }; }; - i2c1_pins_b: i2c1@0 { + i2c1_pins_b: i2c1_0 { pins { pinmux = , /* I2C1 SDA */ ; /* I2C1 SCL */ @@ -172,7 +172,7 @@ }; }; - usbotg_hs_pins_a: usbotg-hs@0 { + usbotg_hs_pins_a: usbotg-hs_0 { pins { pinmux = , /* OTG_HS_ULPI_NXT */ , /* OTG_HS_ULPI_DIR */ @@ -192,7 +192,7 @@ }; }; - usbotg_hs_pins_b: usbotg-hs@1 { + usbotg_hs_pins_b: usbotg-hs_1 { pins { pinmux = , /* OTG_HS_ULPI_NXT */ , /* OTG_HS_ULPI_DIR */ @@ -212,7 +212,7 @@ }; }; - usbotg_fs_pins_a: usbotg-fs@0 { + usbotg_fs_pins_a: usbotg-fs_0 { pins { pinmux = , /* OTG_FS_ID */ , /* OTG_FS_DM */ @@ -223,7 +223,7 @@ }; }; - sdio_pins_a: sdio_pins_a@0 { + sdio_pins_a: sdio_pins_a_0 { pins { pinmux = , /* SDMMC1 D0 */ , /* SDMMC1 D1 */ @@ -236,7 +236,7 @@ }; }; - sdio_pins_od_a: sdio_pins_od_a@0 { + sdio_pins_od_a: sdio_pins_od_a_0 { pins1 { pinmux = , /* SDMMC1 D0 */ , /* SDMMC1 D1 */ @@ -254,7 +254,7 @@ }; }; - sdio_pins_b: sdio_pins_b@0 { + sdio_pins_b: sdio_pins_b_0 { pins { pinmux = , /* SDMMC2 D0 */ , /* SDMMC2 D1 */ @@ -267,7 +267,7 @@ }; }; - sdio_pins_od_b: sdio_pins_od_b@0 { + sdio_pins_od_b: sdio_pins_od_b_0 { pins1 { pinmux = , /* SDMMC2 D0 */ , /* SDMMC2 D1 */ -- 2.15.0