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Date:   Mon, 25 Nov 2019 16:16:18 +0100
From:   Wolfram Sang <wsa@the-dreams.de>
To:     Tali Perry <tali.perry1@gmail.com>
Cc:     robh+dt@kernel.org, mark.rutland@arm.com, yuenn@google.com,
        venture@google.com, benjaminfair@google.com,
        avifishman70@gmail.com, joel@jms.id.au, tmaimon77@gmail.com,
        syniurge@gmail.com, linux-i2c@vger.kernel.org,
        openbmc@lists.ozlabs.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v7 2/2] i2c: npcm: Add Nuvoton NPCM I2C controller driver
Message-ID: <20191125151618.GE2412@kunai>
References: <20191121095350.158689-1-tali.perry1@gmail.com>
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On Thu, Nov 21, 2019 at 11:53:50AM +0200, Tali Perry wrote:
> Add Nuvoton NPCM BMC i2c controller driver.
>=20
> Signed-off-by: Tali Perry <tali.perry1@gmail.com>

Looking at all this SMB_* naming of the registers and also the quirks,
this looks more like an SMBUS controller to me?

> +	// currently I2C slave IF only supports single byte operations.
> +	// in order to utilyze the npcm HW FIFO, the driver will ask for 16bytes
> +	// at a time, pack them in buffer, and then transmit them all together
> +	// to the FIFO and onward to the bus .
> +	// NACK on read will be once reached to bus->adap->quirks->max_read_len
> +	// sending a NACK whever the backend requests for it is not supported.

This for example...

> +static const struct i2c_adapter_quirks npcm_i2c_quirks =3D {
> +	.max_read_len =3D 32768,
> +	.max_write_len =3D 32768,
> +	.max_num_msgs =3D 2,
> +	.flags =3D I2C_AQ_COMB_WRITE_THEN_READ
> +};

=2E.. and this. Like SMBus with the only exception of being able to send
32K in a row. Or?


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