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[209.132.180.67]) by mx.google.com with ESMTP id s13si6429159ejz.102.2019.11.26.00.49.32; Tue, 26 Nov 2019 00:49:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726937AbfKZIs3 convert rfc822-to-8bit (ORCPT + 99 others); Tue, 26 Nov 2019 03:48:29 -0500 Received: from mx1.unisoc.com ([222.66.158.135]:38080 "EHLO SHSQR01.spreadtrum.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726049AbfKZIs2 (ORCPT ); Tue, 26 Nov 2019 03:48:28 -0500 Received: from ig2.spreadtrum.com (bjmbx02.spreadtrum.com [10.0.64.8]) by SHSQR01.spreadtrum.com with ESMTPS id xAQ8kiPO006450 (version=TLSv1 cipher=AES256-SHA bits=256 verify=NO); Tue, 26 Nov 2019 16:46:44 +0800 (CST) (envelope-from Chunyan.Zhang@unisoc.com) Received: from localhost (10.0.74.88) by BJMBX02.spreadtrum.com (10.0.64.8) with Microsoft SMTP Server (TLS) id 15.0.847.32; Tue, 26 Nov 2019 16:46:48 +0800 From: Chunyan Zhang To: Rob Herring , Mark Rutland CC: , , Orson Zhai , Baolin Wang , Chunyan Zhang , Chunyan Zhang Subject: [PATCH v3 0/3] Add Unisoc's SC9863A support Date: Tue, 26 Nov 2019 16:46:41 +0800 Message-ID: <20191126084644.17207-1-chunyan.zhang@unisoc.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT Content-Type: text/plain; charset="utf-8" X-Originating-IP: [10.0.74.88] X-ClientProxiedBy: SHCAS03.spreadtrum.com (10.0.1.207) To BJMBX02.spreadtrum.com (10.0.64.8) X-MAIL: SHSQR01.spreadtrum.com xAQ8kiPO006450 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org SC9863A has Octa-core ARM Cortex A55 application processor. Find more details about it on the website: http://www.unisoc.com/sc9863a Changes from v2: * Discard some dt-bindings patches which have been applied by Rob Herring. * Added a new dt-binding file for sprd global-regs, also added a vendor directory for sprd. * Moved sprd.yaml to the vendor directory. * Addressed comments from Rob: - fixed dtbs_check errors; - move gic under to the bus node; - removed msi-controller from gic, sinceSC9863A doesn't provide ITS; - added specific compatible string for syscon nodes; - cut down registers range of syscon nodes; - removed unnecessary property "sprd,sc-id"; - added earlycon support in devicetree. Changes from v1: - Convert DT bindings to json-schema. Chunyan Zhang (3): dt-bindings: arm: sprd: add global registers bindings dt-bindings: arm: move sprd board file to vendor directory arm64: dts: Add Unisoc's SC9863A SoC support .../bindings/arm/sprd/global-regs.yaml | 34 ++ .../bindings/arm/{ => sprd}/sprd.yaml | 0 arch/arm64/boot/dts/sprd/Makefile | 3 +- arch/arm64/boot/dts/sprd/sc9863a.dtsi | 526 ++++++++++++++++++ arch/arm64/boot/dts/sprd/sharkl3.dtsi | 148 +++++ arch/arm64/boot/dts/sprd/sp9863a-1h10.dts | 39 ++ 6 files changed, 749 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/arm/sprd/global-regs.yaml rename Documentation/devicetree/bindings/arm/{ => sprd}/sprd.yaml (100%) create mode 100644 arch/arm64/boot/dts/sprd/sc9863a.dtsi create mode 100644 arch/arm64/boot/dts/sprd/sharkl3.dtsi create mode 100644 arch/arm64/boot/dts/sprd/sp9863a-1h10.dts -- 2.20.1 ________________________________ This email (including its attachments) is intended only for the person or entity to which it is addressed and may contain information that is privileged, confidential or otherwise protected from disclosure. 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