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linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --AY4kfy1HZpBKLPZd3aB7QyM5ZBu55Awqw Content-Type: multipart/mixed; boundary="LDdXd7seGKOgnBLGToyqENQLjaqjXlQl4"; protected-headers="v1" From: Michal Simek To: Linus Torvalds Cc: LKML Message-ID: <026c97b9-565c-adc3-3d78-fe2e839e9ecd@monstr.eu> Subject: [GIT PULL] arch/microblaze patches for 5.5-rc1 --LDdXd7seGKOgnBLGToyqENQLjaqjXlQl4 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: quoted-printable Hi, please pull the following patches to your tree. Thanks, Michal The following changes since commit da0c9ea146cbe92b832f1b0f694840ea8eb33c= ce: Linux 5.4-rc2 (2019-10-06 14:27:30 -0700) are available in the Git repository at: git://git.monstr.eu/linux-2.6-microblaze.git tags/microblaze-v5.5-rc1 for you to fetch changes up to 22648c989cb8305f51b96b5962df8674697bb2ab: microblaze: Increase max dtb size to 64K from 32K (2019-10-25 08:15:15 +0200) ---------------------------------------------------------------- Microblaze patches for 5.5-rc1 - Extend DTB space - Defconfig update - Clean up rescheduling logic - Enabling SPARSE_IRQ ---------------------------------------------------------------- Manjukumar Matha (1): microblaze: defconfig: Enable devtmps and tmpfs Michal Simek (1): microblaze: Enable SPARSE_IRQ Siva Durga Prasad Paladugu (1): microblaze: Increase max dtb size to 64K from 32K Valentin Schneider (1): microblaze: entry: Remove unneeded need_resched() loop arch/microblaze/Kconfig | 1 + arch/microblaze/configs/mmu_defconfig | 3 +++ arch/microblaze/include/asm/irq.h | 1 - arch/microblaze/kernel/entry.S | 5 ----- arch/microblaze/kernel/head.S | 2 +- arch/microblaze/kernel/vmlinux.lds.S | 2 +- 6 files changed, 6 insertions(+), 8 deletions(-) --=20 Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs --LDdXd7seGKOgnBLGToyqENQLjaqjXlQl4-- --AY4kfy1HZpBKLPZd3aB7QyM5ZBu55Awqw Content-Type: application/pgp-signature; name="signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- iF0EARECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCXd6N9gAKCRDKSWXLKUoM IQfVAJ4yKmdSUC12bIORcqNgbAvlCh/axwCgms5tah1Xv4Rc0mcdn6Wg84R1fWM= =L+Ly -----END PGP SIGNATURE----- --AY4kfy1HZpBKLPZd3aB7QyM5ZBu55Awqw--