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[209.132.180.67]) by mx.google.com with ESMTP id s16si11260854eju.337.2019.11.28.01.29.24; Thu, 28 Nov 2019 01:29:48 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727073AbfK1J11 (ORCPT + 99 others); Thu, 28 Nov 2019 04:27:27 -0500 Received: from mga18.intel.com ([134.134.136.126]:2166 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726569AbfK1J11 (ORCPT ); Thu, 28 Nov 2019 04:27:27 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Nov 2019 01:27:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,253,1571727600"; d="scan'208";a="217563143" Received: from ahunter-desktop.fi.intel.com (HELO [10.237.72.70]) ([10.237.72.70]) by fmsmga001.fm.intel.com with ESMTP; 28 Nov 2019 01:27:24 -0800 Subject: Re: [PATCH] mmc: sdhci: Fix incorrect switch to HS mode To: Faiz Abbas , Alan Cooper , Ulf Hansson Cc: Linux Kernel Mailing List , "linux-mmc@vger.kernel.org" References: <20190903115114.33053-1-alcooperx@gmail.com> <7e495749-1539-9164-d801-305a918318d6@ti.com> From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Message-ID: <6de5746e-bca2-fbe7-ff48-46103b9500a7@intel.com> Date: Thu, 28 Nov 2019 11:26:28 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: <7e495749-1539-9164-d801-305a918318d6@ti.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 28/11/19 10:21 AM, Faiz Abbas wrote: > Hi, > > On 19/09/19 5:27 PM, Alan Cooper wrote: >> This does correct the sequence of switching to HS400 but it might be >> safest to just add this to the latest until it gets a little testing >> to make sure it doesn't expose some bug in existing controllers. >> >> Thanks >> Al >> >> On Tue, Sep 3, 2019 at 10:52 AM Ulf Hansson wrote: >>> >>> On Tue, 3 Sep 2019 at 13:51, Al Cooper wrote: >>>> >>>> When switching from any MMC speed mode that requires 1.8v >>>> (HS200, HS400 and HS400ES) to High Speed (HS) mode, the system >>>> ends up configured for SDR12 with a 50MHz clock which is an illegal >>>> mode. >>>> >>>> This happens because the SDHCI_CTRL_VDD_180 bit in the >>>> SDHCI_HOST_CONTROL2 register is left set and when this bit is >>>> set, the speed mode is controlled by the SDHCI_CTRL_UHS field >>>> in the SDHCI_HOST_CONTROL2 register. The SDHCI_CTRL_UHS field >>>> will end up being set to 0 (SDR12) by sdhci_set_uhs_signaling() >>>> because there is no UHS mode being set. >>>> >>>> The fix is to change sdhci_set_uhs_signaling() to set the >>>> SDHCI_CTRL_UHS field to SDR25 (which is the same as HS) for >>>> any switch to HS mode. > > This change has broken High speed mode in SD card for me in AM65x-evm. I > guess this change only needs to be done for eMMC. SDR25 is decidedly not > the same as high speed for SD card. Shall we revert c894e33ddc1910e14d6f2a2016f60ab613fd8b37 and then Alan could send a patch providing the desired behaviour in ->set_uhs_signaling() of the relevant driver e.g. void ???_set_uhs_signaling(struct sdhci_host *host, unsigned int timing) { if (timing == MMC_TIMING_SD_HS || timing == MMC_TIMING_MMC_HS) timing = MMC_TIMING_UHS_SDR25; sdhci_set_uhs_signaling(host, timing); }