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Subject: Re: MIPS: bug: gettimeofday syscall broken on CI20 board
From:   "H. Nikolaus Schaller" <hns@goldelico.com>
In-Reply-To: <96b53936-a288-91bc-a14b-a501c5231a03@arm.com>
Date:   Thu, 28 Nov 2019 13:16:57 +0100
Cc:     linux-mips@vger.kernel.org, Ralf Baechle <ralf@linux-mips.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Paul Burton <paul.burton@mips.com>,
        MIPS Creator CI20 Development 
        <mips-creator-ci20-dev@googlegroups.com>,
        Discussions about the Letux Kernel 
        <letux-kernel@openphoenux.org>
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References: <18788C50-F29B-4BD7-89F6-B056FF490214@goldelico.com> <703DC004-96E8-463D-8870-3CC410FE1C5E@goldelico.com> <3190d1a4-96c4-1843-3ae1-bae3a97af9fb@arm.com> <8D151C34-41A1-4DFE-92D6-D1B27AEC8730@goldelico.com> <3E2EEC19-F320-4320-9A85-67B4E615C74A@goldelico.com> <96b53936-a288-91bc-a14b-a501c5231a03@arm.com>
To:     Vincenzo Frascino <vincenzo.frascino@arm.com>
Sender: linux-kernel-owner@vger.kernel.org
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> Am 28.11.2019 um 13:05 schrieb Vincenzo Frascino =
<vincenzo.frascino@arm.com>:
>=20
> Hi Nikolaus,
>=20
> On 27/11/2019 14:29, H. Nikolaus Schaller wrote:
>> Hi Vincenco,
>>=20
> [...]
>=20
>>>=20
>>> a) with 5.4 kernel
>>>=20
>=20
> Could you please report the hash of your top commit?

We have our own config and some compile fixes. But the base
commit is 219d54332a09

>=20
> [...]
>=20
>>=20
>> root@letux:~# ./gettime=20
>> r =3D -1 errno=3D1
>> tv.sec =3D 1
>> tv.usec =3D 1
>> rt =3D 1478193516 errno=3D1
>> t =3D 1478193516
>> root@letux:~#=20
>>=20
>=20
> On arm64 the output of your application is what follows:
>=20
> r =3D 0 errno=3D0
> tv.sec =3D 1574942449
> tv.usec =3D 348684
> rt =3D 1574942449 errno=3D0
> t =3D 1574942449
>=20
> Which seems what it is expected.

Indeed. Well, on all other arm architectures I can test (omap3/4/5, =
imx6, raspi)
it is correct. Only on mips jz4780 I see this.

>=20
> On a previous email you mentioned what follows:
>=20
> root@letux:~# cat /proc/cpuinfo
> system type             : JZ4780
> machine                 : img,ci20
> processor               : 0
> cpu model               : Ingenic JZRISC V4.15  FPU V0.0
> BogoMIPS                : 1196.85
> wait instruction        : yes
> microsecond timers      : no
> tlb_entries             : 32
> extra interrupt vector  : yes
> hardware watchpoint     : yes, count: 1, address/irw mask: [0x0fff]
> isa                     : mips1 mips2 mips32r1 mips32r2
> ASEs implemented        :
> shadow register sets    : 1
> kscratch registers      : 0
> package                 : 0
> core                    : 0
> VCED exceptions         : not available
> VCEI exceptions         : not available
>=20
> I am not familiar with JZ4780, which HW clock is it using? (R4K, GIC =
or NONE)?

Ah, good question. How do I find out? Checking defconfig did not show =
any
config with R4K or GIC. So it is likely NONE. CONFIG_RTC_DRV_JZ4740=3Dy =
if that
helps.

BR and thanks,
Nikolaus=