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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id m3sm27328570wrw.20.2019.11.29.07.28.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Nov 2019 07:28:30 -0800 (PST) References: <20191129144605.182774-1-jian.hu@amlogic.com> User-agent: mu4e 1.3.3; emacs 26.2 From: Jerome Brunet To: Jian Hu , Neil Armstrong Cc: Kevin Hilman , "Rob Herring" , Martin Blumenstingl , Michael Turquette , Stephen Boyd , Qiufang Dai , Jianxin Pan , Victor Wan , Chandle Zou , linux-clk@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v3 0/7] add Amlogic A1 clock controller driver In-reply-to: <20191129144605.182774-1-jian.hu@amlogic.com> Date: Fri, 29 Nov 2019 16:28:29 +0100 Message-ID: <1jwobi7lcy.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri 29 Nov 2019 at 15:45, Jian Hu wrote: > add support for Amlogic A1 clock driver, the clock includes > three parts: peripheral clocks, pll clocks, CPU clocks. > sys pll and CPU clocks will be sent in next patch. > > Changes since v1 at [2]: v2 or v1 ?? > -add probe function for A1 > -seperate the clock driver into two patch > -change some clock flags and ops > -add support for a1 PLL ops > -add A1 clock node > > Changes since v1 at [1]: > -place A1 config alphabetically > -add actual reason for RO ops, CLK_IS_CRITICAL, CLK_IGNORE_UNUSED > -separate the driver into two driver: peripheral and pll driver > -delete CLK_IGNORE_UNUSED flag for pwm b/c/d/e/f clock, dsp clock > -delete the change in Kconfig.platforms, address to Kevin alone > -remove the useless comments > -modify the meson pll driver to support A1 PLLs > > [1] https://lkml.kernel.org/r/1569411888-98116-1-git-send-email-jian.hu@amlogic.com > [2] https://lkml.kernel.org/r/1571382865-41978-1-git-send-email-jian.hu@amlogic.com > > Jian Hu (7): > dt-bindings: clock: meson: add A1 PLL clock controller bindings > clk: meson: add support for A1 PLL clock ops > clk: meson: eeclk: refactor eeclk common driver to support A1 > clk: meson: a1: add support for Amlogic A1 PLL clock driver > dt-bindings: clock: meson: add A1 peripheral clock controller bindings > clk: meson: a1: add support for Amlogic A1 Peripheral clock driver > arm64: dts: meson: add A1 PLL and periphs clock controller The arm64 is for the DT maintainer. Please send it separately after this series is applied (if it gets applied) > Please fix the underlying issue, then you can post your series again. This was a comment on your v2. Did you fix the orphan/ordering issue ? If you did, you probably should mention it here. If you did not, I'm probably not going to review this further until you do. > > .../bindings/clock/amlogic,a1-clkc.yaml | 70 + > .../bindings/clock/amlogic,a1-pll-clkc.yaml | 56 + > arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 26 + > drivers/clk/meson/Kconfig | 20 + > drivers/clk/meson/Makefile | 2 + > drivers/clk/meson/a1-pll.c | 334 +++ > drivers/clk/meson/a1-pll.h | 56 + > drivers/clk/meson/a1.c | 2309 +++++++++++++++++ > drivers/clk/meson/a1.h | 120 + > drivers/clk/meson/clk-pll.c | 21 + > drivers/clk/meson/clk-pll.h | 1 + > drivers/clk/meson/meson-eeclk.c | 59 +- > drivers/clk/meson/meson-eeclk.h | 2 + > drivers/clk/meson/parm.h | 1 + > include/dt-bindings/clock/a1-clkc.h | 98 + > include/dt-bindings/clock/a1-pll-clkc.h | 16 + > 16 files changed, 3181 insertions(+), 10 deletions(-) > create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-clkc.yaml > create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml > create mode 100644 drivers/clk/meson/a1-pll.c > create mode 100644 drivers/clk/meson/a1-pll.h > create mode 100644 drivers/clk/meson/a1.c > create mode 100644 drivers/clk/meson/a1.h > create mode 100644 include/dt-bindings/clock/a1-clkc.h > create mode 100644 include/dt-bindings/clock/a1-pll-clkc.h