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[209.132.180.67]) by mx.google.com with ESMTP id x60si17438149ede.172.2019.11.29.22.43.19; Fri, 29 Nov 2019 22:44:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725853AbfK3Gj2 (ORCPT + 99 others); Sat, 30 Nov 2019 01:39:28 -0500 Received: from inca-roads.misterjones.org ([213.251.177.50]:50506 "EHLO inca-roads.misterjones.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725783AbfK3Gj2 (ORCPT ); Sat, 30 Nov 2019 01:39:28 -0500 Received: from 29-193-142-46.pool.kielnet.net ([46.142.193.29] helo=big-swifty.misterjones.org) by cheepnis.misterjones.org with esmtpsa (TLSv1.2:AES256-GCM-SHA384:256) (Exim 4.80) (envelope-from ) id 1iawPa-0000Jo-F1; Sat, 30 Nov 2019 07:39:22 +0100 Date: Sat, 30 Nov 2019 06:39:22 +0000 Message-ID: <86mucdzx45.wl-maz@kernel.org> From: Marc Zyngier To: Heyi Guo Cc: , , , , James Morse , Julien Thierry , Suzuki K Poulose , Will Deacon Subject: Re: [PATCH] kvm/arm64: change gicv3_cpuif to static likely branch In-Reply-To: <20191130031443.41696-1-guoheyi@huawei.com> References: <20191130031443.41696-1-guoheyi@huawei.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.8 EasyPG/1.0.0 Emacs/26 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 46.142.193.29 X-SA-Exim-Rcpt-To: guoheyi@huawei.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, wanghaibin.wang@huawei.com, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, will@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on cheepnis.misterjones.org); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, 30 Nov 2019 03:14:43 +0000, Heyi Guo wrote: > > Platforms running hypervisor nowadays are normally powerful servers > which at least support GICv3, so it should be better to switch > kvm_vgic_global_state.gicv3_cpuif to static likely branch, which can > reduce two "b" instructions to a single "nop" for GICv3 branches. > > We don't update arm32 specific code for they may still only have > GICv2. There is a number of disputable statements here. Out of the fairly large zoo of arm64 systems I have access to, 75% of them are based on GICv2, so they are still the overwhelming majority. Yes, they all run KVM (otherwise I would ignore them). Furthermore, I would expect that "powerful servers" are perfectly capable to execute a couple of branches without breaking a sweat. Finally, you don't provide any number supporting that: - GICv3 systems see a performance improvement across the large variety of CPU implementations - GICv2 systems don't see a performance regression Once you provide such numbers, I'll reevaluate my position. Until then, I'm not considering this kind of change. Thanks, M. -- Jazz is not dead, it just smells funny.