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[209.132.180.67]) by mx.google.com with ESMTP id i20si22237539edv.245.2019.12.02.00.20.57; Mon, 02 Dec 2019 00:21:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="t4VYe/+O"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726179AbfLBIUD (ORCPT + 99 others); Mon, 2 Dec 2019 03:20:03 -0500 Received: from mail.kernel.org ([198.145.29.99]:51078 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725977AbfLBIUD (ORCPT ); Mon, 2 Dec 2019 03:20:03 -0500 Received: from dragon (98.142.130.235.16clouds.com [98.142.130.235]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D6D7F20833; Mon, 2 Dec 2019 08:19:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1575274802; bh=ugPnad4csUtS5gu9gvNWiYsom6nlpl/ToMIjVCWJbZo=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=t4VYe/+Oc3UZ1KYFtA1wTahHsh8T/DkBKOAjLV3QmxJ9AQZJD9FuVuoz0zBVP5cJd 6WDmgdCr0jLI3LnyltUWtEHaHuXSyO4G91iqUGfsOATVp3kxz/wVXVVS13AVMy9U59 VhUdzsyRQVt1jlLwjP9WO0TNt/hw0WpXKTJtvAd0= Date: Mon, 2 Dec 2019 16:19:49 +0800 From: Shawn Guo To: Peng Fan Cc: "sboyd@kernel.org" , "s.hauer@pengutronix.de" , "festevam@gmail.com" , Abel Vesa , "kernel@pengutronix.de" , dl-linux-imx , Anson Huang , Jacky Bai , "linux-clk@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Leonard Crestez Subject: Re: [PATCH] clk: imx: clk-composite-8m: add lock to gate/mux Message-ID: <20191202081948.GD9767@dragon> References: <1572603166-24594-1-git-send-email-peng.fan@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1572603166-24594-1-git-send-email-peng.fan@nxp.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Nov 01, 2019 at 10:16:19AM +0000, Peng Fan wrote: > From: Peng Fan > > There is a lock to diviver in the composite driver, but that's not s/diviver/divider > enought. lock to gate/mux are also needed to provide exclusive access s/enought/enough > to the register. > > Fixes: d3ff9728134e ("clk: imx: Add imx composite clock") > Signed-off-by: Peng Fan Other than above typos, Acked-by: Shawn Guo Stephen, I assume you will take it a fix. Otherwise, please let me know. Shawn > --- > drivers/clk/imx/clk-composite-8m.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c > index e0f25983e80f..20f7c91c03d2 100644 > --- a/drivers/clk/imx/clk-composite-8m.c > +++ b/drivers/clk/imx/clk-composite-8m.c > @@ -142,6 +142,7 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name, > mux->reg = reg; > mux->shift = PCG_PCS_SHIFT; > mux->mask = PCG_PCS_MASK; > + mux->lock = &imx_ccm_lock; > > div = kzalloc(sizeof(*div), GFP_KERNEL); > if (!div) > @@ -161,6 +162,7 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name, > gate_hw = &gate->hw; > gate->reg = reg; > gate->bit_idx = PCG_CGC_SHIFT; > + gate->lock = &imx_ccm_lock; > > hw = clk_hw_register_composite(NULL, name, parent_names, num_parents, > mux_hw, &clk_mux_ops, div_hw, > -- > 2.16.4 >