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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: 3pdhABGwge2Vm48nQ6iX/3M4SmRgaZ87Gz6z3NttCaGNyQGaMCz3IVU1L4cSDg7dwScgkpLa47TOrbUv3rLzDGSMXqcactTeQhU8+vYKU2BlpkPCKQLGphP/DVmywyrsOuEdk4ucDHv2uDI5OEuxqBQx5uVKgDRzhWU/26J4wK6eUcWWCLos/6Svdy+JS9z+eY00toCb7vJHyaWdVF9lixpm+yUBRILV+KJ3s8yVKCA0ZrTy5I7CuyuM+r7PEUfnCw51iVkk8OffUNkKnDEOsSlQkUgKh9oMmufC454lgAIWKN7zwggYDrV3JARccj32WSYDZTsbMOQBvsSRJgnGq0vZj8MDsRuGv15QcP2l+rQiPCVN3SSAfSCdlodXCBVAlnm6F9Let+xdGbcVv+61a//CHxAEKrrQsnLP4D0sv1EucdllAMgCoQS7mB3TTE4HQJ6AyWEvJFJ4/XXboG7BBkZTQnPllHCiIK3pNVvJ7ps= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 25d98f0d-8927-4e71-c790-08d777107336 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Dec 2019 10:14:43.4845 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 2SB3sjZhLErHVr9XAjE4zywVbGNUYge3bDm4ZEe1rQ0mVBv3RQOKDYVeBgTHc39RRkqdzAaL3jwkEIqzdhOkuQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB4545 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Peng Fan This mailbox driver implements a mailbox which signals transmitted data via an ARM smc (secure monitor call) instruction. The mailbox receiver is implemented in firmware and can synchronously return data when it returns execution to the non-secure world again. An asynchronous receive path is not implemented. This allows the usage of a mailbox to trigger firmware actions on SoCs which either don't have a separate management processor or on which such a core is not available. A user of this mailbox could be the SCP interface. Modified from Andre Przywara's v2 patch https://lore.kernel.org/patchwork/patch/812999/ Reviewed-by: Florian Fainelli Reviewed-by: Andre Przywara Signed-off-by: Peng Fan --- drivers/mailbox/Kconfig | 7 ++ drivers/mailbox/Makefile | 2 + drivers/mailbox/arm-smc-mailbox.c | 156 +++++++++++++++++++++++++++++= ++++ include/linux/mailbox/arm-smccc-mbox.h | 17 ++++ 4 files changed, 182 insertions(+) create mode 100644 drivers/mailbox/arm-smc-mailbox.c create mode 100644 include/linux/mailbox/arm-smccc-mbox.h diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig index ab4eb750bbdd..7707ee26251a 100644 --- a/drivers/mailbox/Kconfig +++ b/drivers/mailbox/Kconfig @@ -16,6 +16,13 @@ config ARM_MHU The controller has 3 mailbox channels, the last of which can be used in Secure mode only. =20 +config ARM_SMC_MBOX + tristate "Generic ARM smc mailbox" + depends on OF && HAVE_ARM_SMCCC + help + Generic mailbox driver which uses ARM smc calls to call into + firmware for triggering mailboxes. + config IMX_MBOX tristate "i.MX Mailbox" depends on ARCH_MXC || COMPILE_TEST diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile index c22fad6f696b..93918a84c91b 100644 --- a/drivers/mailbox/Makefile +++ b/drivers/mailbox/Makefile @@ -7,6 +7,8 @@ obj-$(CONFIG_MAILBOX_TEST) +=3D mailbox-test.o =20 obj-$(CONFIG_ARM_MHU) +=3D arm_mhu.o =20 +obj-$(CONFIG_ARM_SMC_MBOX) +=3D arm-smc-mailbox.o + obj-$(CONFIG_IMX_MBOX) +=3D imx-mailbox.o =20 obj-$(CONFIG_ARMADA_37XX_RWTM_MBOX) +=3D armada-37xx-rwtm-mailbox.o diff --git a/drivers/mailbox/arm-smc-mailbox.c b/drivers/mailbox/arm-smc-ma= ilbox.c new file mode 100644 index 000000000000..223d46fe6513 --- /dev/null +++ b/drivers/mailbox/arm-smc-mailbox.c @@ -0,0 +1,156 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2016,2017 ARM Ltd. + * Copyright 2019 NXP + */ + +#include +#include +#include +#include +#include +#include +#include + +typedef unsigned long (smc_mbox_fn)(unsigned int, unsigned long, + unsigned long, unsigned long, + unsigned long, unsigned long, + unsigned long); + +struct arm_smc_chan_data { + unsigned int function_id; + smc_mbox_fn *invoke_smc_mbox_fn; +}; + +static int arm_smc_send_data(struct mbox_chan *link, void *data) +{ + struct arm_smc_chan_data *chan_data =3D link->con_priv; + struct arm_smccc_mbox_cmd *cmd =3D data; + unsigned long ret; + + ret =3D chan_data->invoke_smc_mbox_fn(chan_data->function_id, + cmd->args_smccc[0], + cmd->args_smccc[1], + cmd->args_smccc[2], + cmd->args_smccc[3], + cmd->args_smccc[4], + cmd->args_smccc[5]); + + mbox_chan_received_data(link, (void *)ret); + + return 0; +} + +static unsigned long __invoke_fn_hvc(unsigned int function_id, + unsigned long arg0, unsigned long arg1, + unsigned long arg2, unsigned long arg3, + unsigned long arg4, unsigned long arg5) +{ + struct arm_smccc_res res; + + arm_smccc_hvc(function_id, arg0, arg1, arg2, arg3, arg4, + arg5, 0, &res); + return res.a0; +} + +static unsigned long __invoke_fn_smc(unsigned int function_id, + unsigned long arg0, unsigned long arg1, + unsigned long arg2, unsigned long arg3, + unsigned long arg4, unsigned long arg5) +{ + struct arm_smccc_res res; + + arm_smccc_smc(function_id, arg0, arg1, arg2, arg3, arg4, + arg5, 0, &res); + return res.a0; +} + +static const struct mbox_chan_ops arm_smc_mbox_chan_ops =3D { + .send_data =3D arm_smc_send_data, +}; + +static struct mbox_chan * +arm_smc_mbox_of_xlate(struct mbox_controller *mbox, + const struct of_phandle_args *sp) +{ + return mbox->chans; +} + +static int arm_smc_mbox_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct mbox_controller *mbox; + struct arm_smc_chan_data *chan_data; + int ret; + + mbox =3D devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL); + if (!mbox) + return -ENOMEM; + + mbox->of_xlate =3D arm_smc_mbox_of_xlate; + mbox->num_chans =3D 1; + mbox->chans =3D devm_kzalloc(dev, sizeof(*mbox->chans), GFP_KERNEL); + if (!mbox->chans) + return -ENOMEM; + + chan_data =3D devm_kzalloc(dev, sizeof(*chan_data), GFP_KERNEL); + if (!chan_data) + return -ENOMEM; + + ret =3D of_property_read_u32(dev->of_node, "arm,func-id", + &chan_data->function_id); + if (ret) + return ret; + + if (of_device_is_compatible(dev->of_node, "arm,smc-mbox")) + chan_data->invoke_smc_mbox_fn =3D __invoke_fn_smc; + else + chan_data->invoke_smc_mbox_fn =3D __invoke_fn_hvc; + + + mbox->chans->con_priv =3D chan_data; + + mbox->txdone_poll =3D false; + mbox->txdone_irq =3D false; + mbox->ops =3D &arm_smc_mbox_chan_ops; + mbox->dev =3D dev; + + platform_set_drvdata(pdev, mbox); + + ret =3D devm_mbox_controller_register(dev, mbox); + if (ret) + return ret; + + dev_info(dev, "ARM SMC mailbox enabled.\n"); + + return ret; +} + +static int arm_smc_mbox_remove(struct platform_device *pdev) +{ + struct mbox_controller *mbox =3D platform_get_drvdata(pdev); + + mbox_controller_unregister(mbox); + return 0; +} + +static const struct of_device_id arm_smc_mbox_of_match[] =3D { + { .compatible =3D "arm,smc-mbox", }, + { .compatible =3D "arm,hvc-mbox", }, + {}, +}; +MODULE_DEVICE_TABLE(of, arm_smc_mbox_of_match); + +static struct platform_driver arm_smc_mbox_driver =3D { + .driver =3D { + .name =3D "arm-smc-mbox", + .of_match_table =3D arm_smc_mbox_of_match, + }, + .probe =3D arm_smc_mbox_probe, + .remove =3D arm_smc_mbox_remove, +}; +module_platform_driver(arm_smc_mbox_driver); + +MODULE_AUTHOR("Peng Fan "); +MODULE_DESCRIPTION("Generic ARM smc mailbox driver"); +MODULE_LICENSE("GPL v2"); diff --git a/include/linux/mailbox/arm-smccc-mbox.h b/include/linux/mailbox= /arm-smccc-mbox.h new file mode 100644 index 000000000000..244e09598c10 --- /dev/null +++ b/include/linux/mailbox/arm-smccc-mbox.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef _LINUX_ARM_SMCCC_MBOX_H_ +#define _LINUX_ARM_SMCCC_MBOX_H_ + +#include + +/** + * struct arm_smccc_mbox_cmd - ARM SMCCC message structure + * @args_smccc: actual usage of registers is up to the protocol + * (within the SMCCC limits) + */ +struct arm_smccc_mbox_cmd { + unsigned long args_smccc[6]; +}; + +#endif /* _LINUX_ARM_SMCCC_MBOX_H_ */ --=20 2.16.4