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[209.132.180.67]) by mx.google.com with ESMTP id 25si1641110oij.75.2019.12.03.08.49.34; Tue, 03 Dec 2019 08:49:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726847AbfLCQsm (ORCPT + 99 others); Tue, 3 Dec 2019 11:48:42 -0500 Received: from foss.arm.com ([217.140.110.172]:45510 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726182AbfLCQsl (ORCPT ); Tue, 3 Dec 2019 11:48:41 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DA9C531B; Tue, 3 Dec 2019 08:48:40 -0800 (PST) Received: from [10.1.196.37] (e121345-lin.cambridge.arm.com [10.1.196.37]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C26B13F68E; Tue, 3 Dec 2019 08:48:38 -0800 (PST) Subject: Re: [PATCH v3 4/7] PCI: brcmstb: add Broadcom STB PCIe host controller driver To: Jeremy Linton , Nicolas Saenz Julienne , andrew.murray@arm.com, maz@kernel.org, linux-kernel@vger.kernel.org, Lorenzo Pieralisi , Eric Anholt , Stefan Wahren , Florian Fainelli , bcm-kernel-feedback-list@broadcom.com Cc: mbrugger@suse.com, linux-pci@vger.kernel.org, phil@raspberrypi.org, linux-rpi-kernel@lists.infradead.org, james.quinlan@broadcom.com, Bjorn Helgaas , linux-arm-kernel@lists.infradead.org References: <20191126091946.7970-1-nsaenzjulienne@suse.de> <20191126091946.7970-5-nsaenzjulienne@suse.de> From: Robin Murphy Message-ID: Date: Tue, 3 Dec 2019 16:48:37 +0000 User-Agent: Mozilla/5.0 (X11; Linux aarch64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03/12/2019 4:31 pm, Jeremy Linton wrote: > Hi, > > On 11/26/19 3:19 AM, Nicolas Saenz Julienne wrote: >> From: Jim Quinlan >> >> This adds a basic driver for Broadcom's STB PCIe controller, for now >> aimed at Raspberry Pi 4's SoC, bcm2711. >> >> Signed-off-by: Jim Quinlan >> Co-developed-by: Nicolas Saenz Julienne >> Signed-off-by: Nicolas Saenz Julienne >> >> --- >> >> Changes since v2: >>    - Correct rc_bar2_offset sign >>    - Invert IRQ clear and masking in setup code >>    - Use bitfield.h, redo all register ops while keeping the register >>      names intact >>    - Remove all SHIFT register definitions >>    - Get rid of all _RB writes >>    - Get rid of of_data >>    - Don't iterate over inexisting dma-ranges >>    - Add comment regarding dma-ranges validation >>    - Small cosmetic cleanups >>    - Fix license mismatch >>    - Set driver Kconfig tristate >>    - Didn't add any comment about the controller not being I/O coherent >>      for now as I wait for Jeremy's reply > > I guess its fine.. In answer to the original query. It seems that this > PCIe bridge requires explicit cache operations for DMA from PCIe > endpoints. This wasn't obvious to me at first reading because I was > assuming the custom DMA ops were strictly to deal with the stated DMA > limits. FWIW, although it might seem anathema to server folks, non-coherent PCI is the overwhelming norm in embedded SoCs. Either way, provided the presence or absence of coherency is correctly described via the DT "dma-coherent" or ACPI _CCA property, then it's transparently handled by the DMA API for the endpoint drivers and irrelevant to the host bridge itself - after all, in principle the exact same root complex IP could be integrated both coherently and non-coherently in different SoCs. Robin. > So if you end up respinning, it still might be worthy mentioning > somewhere that this is a non-coherent PCIe implementation. I still hold > much of my original reservations about pieces of this driver. > Particularly, how it might look if someone wanted to boot the RPi using > ACPI on linux. But, I was shown a clever bit of AML recently, which > solves those problems for the RPi and the attached XHCI. > > So, given how much time I've looked at the root port configuration/etc > sections of this driver and I've not found a serious bug: > > Reviewed-by: Jeremy Linton > >> >> Changes since v1: >>    - Fix Kconfig >>    - Remove pci domain check >>    - Remove all MSI related code >>    - Remove supend/resume code >>    - Simplify link state wait routine >>    - Prefix all functions >>    - Use of_device_get_match_data() >>    - Use devm_clk_get_optional() >>    - Get rid of irq variable >>    - Use STB all over the driver >>    - Simplify map_bus() function >>    - Fix license mismatch >>    - Remove unused register definitions >>    - Small cleanups, spell errors >> >> This is based on Jim's original submission[1] but adapted and tailored >> specifically to bcm2711's needs (that's the Raspberry Pi 4). Support for >> the rest of the brcmstb family will soon follow once we get support for >> multiple dma-ranges in dma/direct. >> >> [1] https://patchwork.kernel.org/patch/10605959/ >> >>   drivers/pci/controller/Kconfig        |   8 + >>   drivers/pci/controller/Makefile       |   1 + >>   drivers/pci/controller/pcie-brcmstb.c | 753 ++++++++++++++++++++++++++ >>   3 files changed, 762 insertions(+) >>   create mode 100644 drivers/pci/controller/pcie-brcmstb.c >> > > Thanks, > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel