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Wed, 4 Dec 2019 03:59:39 +0000 From: Naga Sureshkumar Relli To: Srinivas Neeli , "wg@grandegger.com" , "mkl@pengutronix.de" , "davem@davemloft.net" , Michal Simek , Appana Durga Kedareswara Rao CC: "linux-can@vger.kernel.org" , "netdev@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , git , Srinivas Neeli Subject: RE: [PATCH V2] can: xilinx_can: Fix missing Rx can packets on CANFD2.0 Thread-Topic: [PATCH V2] can: xilinx_can: Fix missing Rx can packets on CANFD2.0 Thread-Index: AQHVqdOPUv7+hq6CjUSnDAohvbmmXKepWmLg Date: Wed, 4 Dec 2019 03:59:38 +0000 Message-ID: References: <1575375396-3403-1-git-send-email-srinivas.neeli@xilinx.com> In-Reply-To: <1575375396-3403-1-git-send-email-srinivas.neeli@xilinx.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=nagasure@xilinx.com; x-originating-ip: [149.199.50.133] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: b377bdd3-2a0c-4805-bbe5-08d7786e628d x-ms-traffictypediagnostic: MN2PR02MB6813:|MN2PR02MB6813: x-ld-processed: 657af505-d5df-48d0-8300-c31994686c5c,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:4941; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-Network-Message-Id: b377bdd3-2a0c-4805-bbe5-08d7786e628d X-MS-Exchange-CrossTenant-originalarrivaltime: 04 Dec 2019 03:59:39.0446 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: N39VlpqxBGrIlMGauCvZS9BpQaD1zyD28g3RnbspcDV6pAK+nJWkCoXwiR2c5ZOmL4A38WRFVc0FNCZQJvm2Ig== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR02MB6813 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Reviewed-by: Naga Sureshkumar Relli > -----Original Message----- > From: Srinivas Neeli > Sent: Tuesday, December 3, 2019 5:47 PM > To: wg@grandegger.com; mkl@pengutronix.de; davem@davemloft.net; Michal Si= mek > ; Appana Durga Kedareswara Rao > Cc: linux-can@vger.kernel.org; netdev@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; git ; Naga > Sureshkumar Relli ; Srinivas Neeli > Subject: [PATCH V2] can: xilinx_can: Fix missing Rx can packets on CANFD2= .0 >=20 > CANFD2.0 core uses BRAM for storing acceptance filter ID(AFID) and MASK > (AFMASK)registers. So by default AFID and AFMASK registers contain random= data. Due to > random data, we are not able to receive all CAN ids. >=20 > Initializing AFID and AFMASK registers with Zero before enabling acceptan= ce filter to > receive all packets irrespective of ID and Mask. >=20 > Fixes: 0db9071353a0 ("can: xilinx: add can 2.0 support") > Signed-off-by: Michal Simek > Signed-off-by: Srinivas Neeli > --- > drivers/net/can/xilinx_can.c | 7 +++++++ > 1 file changed, 7 insertions(+) >=20 > diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c = index > 464af939cd8a..c1dbab8c896d 100644 > --- a/drivers/net/can/xilinx_can.c > +++ b/drivers/net/can/xilinx_can.c > @@ -60,6 +60,8 @@ enum xcan_reg { > XCAN_TXMSG_BASE_OFFSET =3D 0x0100, /* TX Message Space */ > XCAN_RXMSG_BASE_OFFSET =3D 0x1100, /* RX Message Space */ > XCAN_RXMSG_2_BASE_OFFSET =3D 0x2100, /* RX Message Space */ > + XCAN_AFR_2_MASK_OFFSET =3D 0x0A00, /* Acceptance Filter MASK */ > + XCAN_AFR_2_ID_OFFSET =3D 0x0A04, /* Acceptance Filter ID */ > }; >=20 > #define XCAN_FRAME_ID_OFFSET(frame_base) ((frame_base) + 0x00) > @@ -1809,6 +1811,11 @@ static int xcan_probe(struct platform_device *pdev= ) >=20 > pm_runtime_put(&pdev->dev); >=20 > + if (priv->devtype.flags & XCAN_FLAG_CANFD_2) { > + priv->write_reg(priv, XCAN_AFR_2_ID_OFFSET, 0x00000000); > + priv->write_reg(priv, XCAN_AFR_2_MASK_OFFSET, 0x00000000); > + } > + > netdev_dbg(ndev, "reg_base=3D0x%p irq=3D%d clock=3D%d, tx buffers: actu= al %d, using > %d\n", > priv->reg_base, ndev->irq, priv->can.clock.freq, > hw_tx_max, priv->tx_max); > -- > 2.7.4