Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp257613ybl; Wed, 4 Dec 2019 02:12:36 -0800 (PST) X-Google-Smtp-Source: APXvYqzZBqE8e5W+0nRUaW7q9TpASsMuOFhiYLEaUzA3q2YU0SdR5Asi6W5McQg1a3sh2FhRX2ko X-Received: by 2002:a05:6808:6ce:: with SMTP id m14mr1878370oih.27.1575454355065; Wed, 04 Dec 2019 02:12:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1575454355; cv=none; d=google.com; s=arc-20160816; b=ujV70UNs5uCW4BagjTwoUzjNOnX6e8YEO4ddlEcuKIIF1wMVGjEVp4ctLC0ZA8xpih QzrrnKdKrPx/CgVjAXb64aNmBKL8gYIoQt1cRjHeWA6yy8G9baa3SrJM2pc+yAQkzVLM kSUhOnJx/79IyE4EiYASLu48UiBj5W0jixd9pkGQ26RUK9UAF3AVML8nxpc4lozKzBnG mlpj8USk9JsSteX4M8pPuAu8PRy8fLeBl/OTeRI9n2xv0bfIxDSjgTol/lV0HKOtbcdz fiZNQVjGE1USxvx+MvrcBdnChCauUIhGq5TZGrtwPqGcJV/PdzYIC18Jhytlrtrfg+l7 EX6A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature; bh=X78/UEM1JDrsz2wbO1IYinDOnIrG936f4cZHAjiIgwM=; b=cN32CoNVczkT2WMtgz9aKiOXaZ+uXwkE5OM8bC2mgbB0fwtlsGYGhZN5m0B82tBmRB +OZ7tfNeoclIXT1xK3hLy1wsSvT3ak+UGjHKqYqhyckQ7q2hB+266K19MsMRjglTkx2s cT1bTCC7jTXSf/OpU7DautL1bPxeY6xYrjVR/SLByG4MsCjVl3glNqACyfzI5CyEIyCn OqbMoFlbVOARdrYmmx53bKMgw9RhcH7NSeqWZJmxcst70yacn6aGch1tJbuwQl5NBWT0 514lGwrpII8kVA8AaAuJB3F2M1FWXfQO+Cc8plVkyXty1oAVLD1FaEPH6+CCM2JfrapW erUQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b="mcc9/JwG"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w1si2558484otg.273.2019.12.04.02.12.22; Wed, 04 Dec 2019 02:12:35 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b="mcc9/JwG"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727740AbfLDKLY (ORCPT + 99 others); Wed, 4 Dec 2019 05:11:24 -0500 Received: from mail-pf1-f194.google.com ([209.85.210.194]:46552 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726893AbfLDKLX (ORCPT ); Wed, 4 Dec 2019 05:11:23 -0500 Received: by mail-pf1-f194.google.com with SMTP id y14so2950378pfm.13; Wed, 04 Dec 2019 02:11:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=X78/UEM1JDrsz2wbO1IYinDOnIrG936f4cZHAjiIgwM=; b=mcc9/JwGLQwm7ZMNhOYcNdyWvi4LosHbEB0fgv3GqhEDPCaay5uNwBREPTBg07YQIz qHnMQ92JxpZEGfkH162ZJj9Z+saw0h/pchkStOt9lIu9kziZWopAZbOcZwMyxCYlQarv ZmsRJN158PNPPcdNxF9tpswG9cyhXDpe5p/5bsCFvuqeCzDRs/KQcSJzGafpisXqu41U A9wbUDdNtbjrP9qLkHTsQgQH/mDuuexx/hLCz8bKoMgUJdAU1cfmLg7QHT74tu6mmVJc vC+A/KeqBbIfSAk18SVw5KRc1OCoQGcUDPKEQ7RjhBYluUsVZhEI9NNT2YYg4KitrjgL UEpw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=X78/UEM1JDrsz2wbO1IYinDOnIrG936f4cZHAjiIgwM=; b=Ns6MwYB8oL62VBX/CIfVZm8jwQfFptcB7Saoghbtwi086/7eS5r0ttqhzkHdAOo8YS S7CcnHz+HEivXisSvYmLXMAhyBica1gKfSfE832LxUNc66uSAdXrPUVVnp3Zt6TTDQIi +DnFQuTbiM6JAhcx5icpB1kkqxOjGOAbgsKLDTO5tCJjwa6uI3jf4IGEo311Hl+oBcgQ M4blqSDgK6IHdnEPr50V0l3jLbRKQHOCyeepdxA2hToh/OamrDeZLXQuIRdEzW9zsrfB +l9uMfr0Jwj+lxK8XAPtWG4yXZd5K2UXuLcOZATiHCL8MPR7+9fs9lbMUoJpR9Xytlxe nhoQ== X-Gm-Message-State: APjAAAUCxoo9DuEh+yZlfNXSr29Eq7aXOoYtFuzoSA+ABLJmhSmFlDVb S9eSwluvctJJsGDBnr2h+vQ= X-Received: by 2002:a63:5056:: with SMTP id q22mr2641312pgl.20.1575454282892; Wed, 04 Dec 2019 02:11:22 -0800 (PST) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id 67sm7664259pfw.82.2019.12.04.02.11.20 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 04 Dec 2019 02:11:22 -0800 (PST) From: Baolin Wang To: ohad@wizery.com, bjorn.andersson@linaro.org Cc: baolin.wang7@gmail.com, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] hwspinlock: Allow drivers to be built with COMPILE_TEST Date: Wed, 4 Dec 2019 18:10:40 +0800 Message-Id: <808692052649aa2e80693a2734cb392e5eddd83c.1575454108.git.baolin.wang7@gmail.com> X-Mailer: git-send-email 1.7.9.5 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Allow drivers to be built with COMPILE_TEST. Signed-off-by: Baolin Wang --- drivers/hwspinlock/Kconfig | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/hwspinlock/Kconfig b/drivers/hwspinlock/Kconfig index 37740e9..cefaa4f 100644 --- a/drivers/hwspinlock/Kconfig +++ b/drivers/hwspinlock/Kconfig @@ -9,7 +9,7 @@ menuconfig HWSPINLOCK config HWSPINLOCK_OMAP tristate "OMAP Hardware Spinlock device" depends on HWSPINLOCK - depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX || ARCH_K3 + depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX || ARCH_K3 || COMPILE_TEST help Say y here to support the OMAP Hardware Spinlock device (firstly introduced in OMAP4). @@ -19,7 +19,7 @@ config HWSPINLOCK_OMAP config HWSPINLOCK_QCOM tristate "Qualcomm Hardware Spinlock device" depends on HWSPINLOCK - depends on ARCH_QCOM + depends on ARCH_QCOM || COMPILE_TEST select MFD_SYSCON help Say y here to support the Qualcomm Hardware Mutex functionality, which @@ -31,7 +31,7 @@ config HWSPINLOCK_QCOM config HWSPINLOCK_SIRF tristate "SIRF Hardware Spinlock device" depends on HWSPINLOCK - depends on ARCH_SIRF + depends on ARCH_SIRF || COMPILE_TEST help Say y here to support the SIRF Hardware Spinlock device, which provides a synchronisation mechanism for the various processors @@ -43,7 +43,7 @@ config HWSPINLOCK_SIRF config HWSPINLOCK_SPRD tristate "SPRD Hardware Spinlock device" depends on ARCH_SPRD - depends on HWSPINLOCK + depends on HWSPINLOCK || COMPILE_TEST help Say y here to support the SPRD Hardware Spinlock device. @@ -52,7 +52,7 @@ config HWSPINLOCK_SPRD config HWSPINLOCK_STM32 tristate "STM32 Hardware Spinlock device" depends on MACH_STM32MP157 - depends on HWSPINLOCK + depends on HWSPINLOCK || COMPILE_TEST help Say y here to support the STM32 Hardware Spinlock device. @@ -61,7 +61,7 @@ config HWSPINLOCK_STM32 config HSEM_U8500 tristate "STE Hardware Semaphore functionality" depends on HWSPINLOCK - depends on ARCH_U8500 + depends on ARCH_U8500 || COMPILE_TEST help Say y here to support the STE Hardware Semaphore functionality, which provides a synchronisation mechanism for the various processor on the -- 1.7.9.5