Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
MIME-Version: 1.0
References: <20191204101042.4275-5-cleger@kalray.eu> <CAHp75VdQ6VooLVAfA1z98-bBcfQuR7AomaO8F19AGRjeBtByEQ@mail.gmail.com>
 <1988869450.95325741.1575471003953.JavaMail.zimbra@kalray.eu>
In-Reply-To: <1988869450.95325741.1575471003953.JavaMail.zimbra@kalray.eu>
From:   Andy Shevchenko <andy.shevchenko@gmail.com>
Date:   Wed, 4 Dec 2019 19:58:35 +0200
Message-ID: <CAHp75Vc6oU2nNkKT8N+6RomSxHVXu0AvwoZVBKvTERLQ68Kz_Q@mail.gmail.com>
Subject: Re: [PATCH 4/5] pinctrl: dw: add pinctrl support for dwapb gpio driver
To:     =?UTF-8?Q?Cl=C3=A9ment_Leger?= <cleger@kalray.eu>
Cc:     linux-kernel <linux-kernel@vger.kernel.org>,
        Linus Walleij <linus.walleij@linaro.org>,
        Hoan Tran <hoan@os.amperecomputing.com>,
        "open list, GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

On Wed, Dec 4, 2019 at 4:50 PM Cl=C3=A9ment Leger <cleger@kalray.eu> wrote:
> ----- On 4 Dec, 2019, at 13:43, Andy Shevchenko andy.shevchenko@gmail.com=
 wrote:
> > On Wed, Dec 4, 2019 at 12:12 PM Clement Leger <cleger@kalray.eu> wrote:

> > Can't you split adding pin control data to a separate patch?
>
> Yes even if the first one will not be buildable.

It will. Just split it wisely.
I'm preparing Intel Lynxpoint conversion (you may see the approach
here [1]) and I stumbled over similar problem.

[1]: https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel.git/comm=
it/?h=3Dreview-andy&id=3Dddbf10ea98c1c96de98fb5878ca0d0042e912f6a

> > Can't we generate these lists dynamically?
>
> Indeed, these list could be dynamically generated. However, since they
> can be shared between all pinctrl instances of this driver I thought
> it was better to keep them common and simply restrict the number
> of pins at pinctrl registration. But as I said, I can generate them if
> you want.

OK, let's wait for subsys maintainers to comment on this.

> >> +       ret =3D pinctrl_enable(port->pctl);
> >> +       if (ret) {
> >> +               dev_err(gpio->dev, "pinctrl enable failed\n");
> >> +               return ret;
> >> +       }
> >
> > Not sure why it's needed at all.
>
> I saw a comment over "pinctrl_register" in pinctrl.h saying:
>
> /* Please use pinctrl_register_and_init() and pinctrl_enable() instead */
>
> So I switched to pinctrl_register_and_init + pinctrl_enable.

I read the code and do not see any evidence you have to use above.
Do you plan to do something in between of those two calls?

> > Can you use new callback for this?
>
> Do you mean the gpiochip add_pin_ranges callback ?
> If so, I will look at it.

I meant ->add_pin_ranges() which is part of GPIO chip structure.

> >> -               .name   =3D "gpio-dwapb",
> >> +               .name   =3D "pinctrl-dwapb",
> >
> > This will break existing users.
>
> Ok, I will revert that.

You may fix users at the same time.
Either fine with me.

--
With Best Regards,
Andy Shevchenko