Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp761738ybl; Wed, 4 Dec 2019 10:24:58 -0800 (PST) X-Google-Smtp-Source: APXvYqxDXcE1HWPt6A/NnQgySeimlhk33Egbe1MhiCCSsvGj8YgZqudOaI11fnDIxdI7NOAhCbCE X-Received: by 2002:a9d:155:: with SMTP id 79mr3422760otu.240.1575483898297; Wed, 04 Dec 2019 10:24:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1575483898; cv=none; d=google.com; s=arc-20160816; b=UQ32qMKnz0n7jFvm+6kO96sWJTKzbG7y7AlP7SClqWyZelAhL2s9kZcHV9I0y5XPDD ITWBbNcnK7nu7+15CItbb8fJb3MAJTLQ+Vzr9MSXZWDOrStvckrnsicxR7uymS5ZSOeu fEfIt9DtLpiYQH0eI8BKj1Bvp5wokD8CCnQ60xNl44qT/KG22EMwlA3p9l3z4/FAPmSZ tr1XivOj2+Ken9GlDYP9k1tYDg9qfLwI6bIoC0ZpTvRJHw4xlbJv+EevrK02dsNfAI4G q2hlelD+qR28ozyqBPi3IAQ+ZGzEfVfQyzUOoj6mVSonInzT0KPxs5F0OwX73Ct0sd5K FxMg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Z8Uighl8POoFYkCXBNYcmu40SBltic7Jzkm/3+ISl2o=; b=LKdfsPomY0GQMuOPL+uoWAJKPXovUyohdtrHiqdN28l58kMPoZ+Z+3cpCpUsvf4HDU CMzdikbwdx6Yb3g5//qZa7zKbRv/3ieYH8Wr07d2fyKXv8iCkB+NN3B7rUIsS1Yhh4R6 mhGk5GHr4KvKxQiiVQtJFuoq5Vg7pt6YoU9WjqR0HyRG9oxWD1Zm8k30bXjqlTWy3RCL 8+tmokqUwi4TwBO9lG4+ZaBDWG+VriIzHTT9vL1Ljzmhdljw2dc1NBTvWcIVAyIAI5Ci OVLEcdG/0zMUAcNRDps+MolPlL8EN/w/f1ZnRSGc1W7UW+pM2+0NEEn8Z9M2rLekwilv INXw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=vAIUtrhl; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z1si3424884otp.70.2019.12.04.10.24.44; Wed, 04 Dec 2019 10:24:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=vAIUtrhl; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730816AbfLDSW3 (ORCPT + 99 others); Wed, 4 Dec 2019 13:22:29 -0500 Received: from mail.kernel.org ([198.145.29.99]:51396 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730335AbfLDSFK (ORCPT ); Wed, 4 Dec 2019 13:05:10 -0500 Received: from localhost (unknown [217.68.49.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B6AEE20659; Wed, 4 Dec 2019 18:05:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1575482710; bh=knbKsM2PPdiJ13pHkQSZUjV9t4XeGk2gTHxk015Ntho=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=vAIUtrhl0yPzSfdk8o0Jr1KVkujVu9Pr0MeuCBd2Klno0NoyM8Z4Tbho0YgQZO1P9 lnUctLIrOw5rSobIM5c2Rmh+5yH18m946Nt2EUVvz2ne8LlrpAgJs7mr+esC/FDVtL JOMZXykxrmaOCKPmiLUTqYJi0G1QrlLUy2dPz+BA= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Christophe Leroy , Scott Wood , Sasha Levin Subject: [PATCH 4.14 105/209] powerpc/83xx: handle machine check caused by watchdog timer Date: Wed, 4 Dec 2019 18:55:17 +0100 Message-Id: <20191204175329.091245216@linuxfoundation.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191204175321.609072813@linuxfoundation.org> References: <20191204175321.609072813@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Christophe Leroy [ Upstream commit 0deae39cec6dab3a66794f3e9e83ca4dc30080f1 ] When the watchdog timer is set in interrupt mode, it causes a machine check when it times out. The purpose of this mode is to ease debugging, not to crash the kernel and reboot the machine. This patch implements a special handling for that, in order to not crash the kernel if the watchdog times out while in interrupt or within the idle task. Signed-off-by: Christophe Leroy [scottwood: added missing #include] Signed-off-by: Scott Wood Signed-off-by: Sasha Levin --- arch/powerpc/include/asm/cputable.h | 1 + arch/powerpc/include/asm/reg.h | 2 ++ arch/powerpc/kernel/cputable.c | 10 ++++++---- arch/powerpc/platforms/83xx/misc.c | 17 +++++++++++++++++ 4 files changed, 26 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h index 7e3ccf21830e6..e4451b30d7e32 100644 --- a/arch/powerpc/include/asm/cputable.h +++ b/arch/powerpc/include/asm/cputable.h @@ -45,6 +45,7 @@ extern int machine_check_e500(struct pt_regs *regs); extern int machine_check_e200(struct pt_regs *regs); extern int machine_check_47x(struct pt_regs *regs); int machine_check_8xx(struct pt_regs *regs); +int machine_check_83xx(struct pt_regs *regs); extern void cpu_down_flush_e500v2(void); extern void cpu_down_flush_e500mc(void); diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index b779f3ccd4126..05f3c2b3aa0ec 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -733,6 +733,8 @@ #define SRR1_PROGTRAP 0x00020000 /* Trap */ #define SRR1_PROGADDR 0x00010000 /* SRR0 contains subsequent addr */ +#define SRR1_MCE_MCP 0x00080000 /* Machine check signal caused interrupt */ + #define SPRN_HSRR0 0x13A /* Save/Restore Register 0 */ #define SPRN_HSRR1 0x13B /* Save/Restore Register 1 */ #define HSRR1_DENORM 0x00100000 /* Denorm exception */ diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 760872916013d..da4b0e3792380 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c @@ -1185,6 +1185,7 @@ static struct cpu_spec __initdata cpu_specs[] = { .machine_check = machine_check_generic, .platform = "ppc603", }, +#ifdef CONFIG_PPC_83xx { /* e300c1 (a 603e core, plus some) on 83xx */ .pvr_mask = 0x7fff0000, .pvr_value = 0x00830000, @@ -1195,7 +1196,7 @@ static struct cpu_spec __initdata cpu_specs[] = { .icache_bsize = 32, .dcache_bsize = 32, .cpu_setup = __setup_cpu_603, - .machine_check = machine_check_generic, + .machine_check = machine_check_83xx, .platform = "ppc603", }, { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ @@ -1209,7 +1210,7 @@ static struct cpu_spec __initdata cpu_specs[] = { .icache_bsize = 32, .dcache_bsize = 32, .cpu_setup = __setup_cpu_603, - .machine_check = machine_check_generic, + .machine_check = machine_check_83xx, .platform = "ppc603", }, { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ @@ -1223,7 +1224,7 @@ static struct cpu_spec __initdata cpu_specs[] = { .icache_bsize = 32, .dcache_bsize = 32, .cpu_setup = __setup_cpu_603, - .machine_check = machine_check_generic, + .machine_check = machine_check_83xx, .num_pmcs = 4, .oprofile_cpu_type = "ppc/e300", .oprofile_type = PPC_OPROFILE_FSL_EMB, @@ -1240,12 +1241,13 @@ static struct cpu_spec __initdata cpu_specs[] = { .icache_bsize = 32, .dcache_bsize = 32, .cpu_setup = __setup_cpu_603, - .machine_check = machine_check_generic, + .machine_check = machine_check_83xx, .num_pmcs = 4, .oprofile_cpu_type = "ppc/e300", .oprofile_type = PPC_OPROFILE_FSL_EMB, .platform = "ppc603", }, +#endif { /* default match, we assume split I/D cache & TB (non-601)... */ .pvr_mask = 0x00000000, .pvr_value = 0x00000000, diff --git a/arch/powerpc/platforms/83xx/misc.c b/arch/powerpc/platforms/83xx/misc.c index d75c9816a5c92..2b6589fe812dd 100644 --- a/arch/powerpc/platforms/83xx/misc.c +++ b/arch/powerpc/platforms/83xx/misc.c @@ -14,6 +14,7 @@ #include #include +#include #include #include #include @@ -150,3 +151,19 @@ void __init mpc83xx_setup_arch(void) mpc83xx_setup_pci(); } + +int machine_check_83xx(struct pt_regs *regs) +{ + u32 mask = 1 << (31 - IPIC_MCP_WDT); + + if (!(regs->msr & SRR1_MCE_MCP) || !(ipic_get_mcp_status() & mask)) + return machine_check_generic(regs); + ipic_clear_mcp_status(mask); + + if (debugger_fault_handler(regs)) + return 1; + + die("Watchdog NMI Reset", regs, 0); + + return 1; +} -- 2.20.1