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[209.132.180.67]) by mx.google.com with ESMTP id e5si4238343oth.288.2019.12.04.11.57.18; Wed, 04 Dec 2019 11:57:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=lbhaO1dQ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728144AbfLDT4P (ORCPT + 99 others); Wed, 4 Dec 2019 14:56:15 -0500 Received: from mail-il1-f170.google.com ([209.85.166.170]:43347 "EHLO mail-il1-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727930AbfLDT4P (ORCPT ); Wed, 4 Dec 2019 14:56:15 -0500 Received: by mail-il1-f170.google.com with SMTP id u16so663460ilg.10 for ; Wed, 04 Dec 2019 11:56:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=1Y5s64cDULUztNcj+XAj5kwGyOnu+jNjLT/oyzvuGnI=; b=lbhaO1dQlgHzGQ5/4HMIQNpdlZiHVoUDGDV3tjj+/pi9pCZkoep1cf8V5QgBeOuDIc toI/ovwS4rTeWE1+5kTjhxxL6kjb470G5qpiOx7GJiwRRr6VnK7pFMMvyeGZ35NguKoc ZUYtXiubBjwoKVFPdR+LKkSzD6rZPTo+nxA0wQPPlcAVH+nMhxUHeaitXbcgh/QZK0AY WnhjKU90RXxBnb3PtXqXI0cB8HPWPyhA19OAc1qwA9s0xDr/R+VedqHa6C8WpX2sS+Rc ioOvWq9xQCNBh9qS+xGfoOIkcnncMmOVcioOtRdojOpxJJwOmFY5Jbgl8UjtXOyrT5JU rtag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=1Y5s64cDULUztNcj+XAj5kwGyOnu+jNjLT/oyzvuGnI=; b=MvYSG9ElmddQnT1kVoOXpte5mEPJKrYeeJVSZ/8rDc/rDzDBrY/kde/+1A7dqJjHcV /Y0QGxsxHmbW15SD2s/IgTU1RziCKI8joA4t8Dwt9JSItbrSQMsyODGY36Zj1+gNBliT tAmFA4D00UxyHgZypNuybA0OqKlyW2DhvmS/7DmS8XGKOg3Yz82hbiO46ePk3dvJILYv 1HTCNVQrXJoW0tU7PqOEQIcErcYMWSDPZeNXMNcfO24cW4w+EzEdfRq+jDa36jLbfxxO WJKt5e6aSoqemzUUF/hqy9tBeXGKOWEv/OKjINK+PFKnFE0XYFLBH/zQsw0hj4mY6mrn FoZQ== X-Gm-Message-State: APjAAAXWPXwkWj3wQeou+SO5WTvWFcPJpnacVEyGqarKK3g+ulSyAhDl r1EwqrJgIfcNwD0/etxX65/u3kwTMzvdViUKdaM8JQ== X-Received: by 2002:a92:d609:: with SMTP id w9mr5538958ilm.46.1575489374145; Wed, 04 Dec 2019 11:56:14 -0800 (PST) MIME-Version: 1.0 References: <20191203004043.174977-1-matthewgarrett@google.com> In-Reply-To: From: Matthew Garrett Date: Wed, 4 Dec 2019 11:56:02 -0800 Message-ID: Subject: Re: [PATCH] [EFI,PCI] Allow disabling PCI busmastering on bridges during boot To: Andy Lutomirski Cc: linux-efi , Ard Biesheuvel , X86 ML , linux-pci , LKML Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Dec 4, 2019 at 11:50 AM Andy Lutomirski wrote: > Wouldn't it also be applicable in the much simpler case where the > firmware hands over control with no IOMMU configured but also with the > busmastering bit cleared. Does firmware do this? Does the kernel > currently configure the iOMMU before enabling busmastering? We already handle this case - the kernel doesn't activate busmastering until after it does IOMMU setup.