Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
From:   Leonard Crestez <leonard.crestez@nxp.com>
To:     Peng Fan <peng.fan@nxp.com>,
        "shawnguo@kernel.org" <shawnguo@kernel.org>,
        Aisheng Dong <aisheng.dong@nxp.com>,
        "sboyd@kernel.org" <sboyd@kernel.org>
CC:     "s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
        "festevam@gmail.com" <festevam@gmail.com>,
        Abel Vesa <abel.vesa@nxp.com>,
        "kernel@pengutronix.de" <kernel@pengutronix.de>,
        dl-linux-imx <linux-imx@nxp.com>,
        "linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Alice Guo <alice.guo@nxp.com>
Subject: Re: [PATCH] clk: imx: imx8qxp-lpcg: use
 devm_platform_ioremap_resource
Thread-Topic: [PATCH] clk: imx: imx8qxp-lpcg: use
 devm_platform_ioremap_resource
Thread-Index: AQHVqoum7IH7ZRFDgESKl5wnHnxd3Q==
Date:   Thu, 5 Dec 2019 08:59:38 +0000
Message-ID: <VI1PR04MB70232C511E4F43360D7533C9EE5C0@VI1PR04MB7023.eurprd04.prod.outlook.com>
References: <1575454349-5762-1-git-send-email-peng.fan@nxp.com>
 <VI1PR04MB7023E9790323200A4B122445EE5D0@VI1PR04MB7023.eurprd04.prod.outlook.com>
 <AM0PR04MB4481FC4A8FD76A01242424B5885C0@AM0PR04MB4481.eurprd04.prod.outlook.com>
Accept-Language: en-US
Content-Language: en-US
received-spf: None (protection.outlook.com: nxp.com does not designate
 permitted sender hosts)
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
X-MS-Exchange-CrossTenant-Network-Message-Id: b31ce410-20ac-4088-1d09-08d77961754b
X-MS-Exchange-CrossTenant-originalarrivaltime: 05 Dec 2019 08:59:38.2451
 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635
X-MS-Exchange-CrossTenant-mailboxtype: HOSTED
X-MS-Exchange-CrossTenant-userprincipalname: lTBLCAqg9wmr6sPl78P10hAiMAACnE1yABwqdEt0A+ONCg41oDoncHn/TZ9oEQC+IAWVoLdGVwxR0IRJ5evboQ==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB6847
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On 2019-12-05 3:38 AM, Peng Fan wrote:=0A=
>> Subject: Re: [PATCH] clk: imx: imx8qxp-lpcg: use=0A=
>> devm_platform_ioremap_resource=0A=
>>=0A=
>> On 2019-12-04 12:14 PM, Peng Fan wrote:=0A=
>>> From: Peng Fan <peng.fan@nxp.com>=0A=
>>>=0A=
>>> devm_platform_ioremap_resource() wraps platform_get_resource() and=0A=
>>> devm_ioremap_resource(), we could use this API to simplify the code.=0A=
>>>=0A=
>>> Signed-off-by: Peng Fan <peng.fan@nxp.com>=0A=
>>=0A=
>> This patch has been posted before and it breaks uart on imx8qxp-mek and=
=0A=
>> possibly other things.=0A=
>>=0A=
>> The old and new paths are not equivalent: devm_platform_ioremap_resource=
=0A=
>> calls devm_ioremap_resource differs from devm_ioremap by also calling=0A=
>> devm_request_mem_region.=0A=
>>=0A=
>> This prevents other mappings in the area; this is not an issue for most =
drivers=0A=
>> but imx8qxp-lpcg maps whole subsystems. For example:=0A=
>>=0A=
>>                   adma_lpcg: clock-controller@59000000 {=0A=
>>                           compatible =3D "fsl,imx8qxp-lpcg-adma";=0A=
>>                           reg =3D <0x59000000 0x2000000>;=0A=
>>                           #clock-cells =3D <1>;=0A=
>>                   };=0A=
>>=0A=
>>                   adma_lpuart0: serial@5a060000 {=0A=
>>                           reg =3D <0x5a060000 0x1000>;=0A=
>> 			...=0A=
>> 		};=0A=
>>=0A=
>> Previously: https://patchwork.kernel.org/patch/10908807/=0A=
> =0A=
> Thanks. I think at least need to provide some comments in code.=0A=
=0A=
Yes, comments would help. I think it's actually the 3rd time this =0A=
incorrect cleanup was posted.=0A=
=0A=
But mapping entire subsystems (32mb at a time) for LPCG is deeply =0A=
flawed: the LPCG areas are each 64k and they're interspersed among the =0A=
peripherals. The correct solution is to have many small clock providers.=0A=
=0A=
This is done by a series of patches from Aisheng, I think this is the =0A=
latest one:=0A=
=0A=
https://patchwork.kernel.org/patch/11248235/=0A=
=0A=
If some aspects of that series are dubious perhaps they could be =0A=
discussed and maybe the series could be split into smaller chunks?=0A=
=0A=
That series does brings many essential improvements to imx8 clk support.=0A=
=0A=
--=0A=
Regards,=0A=
Leonard=0A=